Searched refs:MG_PLL_DIV1 (Results 1 – 2 of 2) sorted by relevance
2967 hw_state->mg_pll_div1 = I915_READ(MG_PLL_DIV1(port)); in icl_pll_get_hw_state()3040 I915_WRITE(MG_PLL_DIV1(port), hw_state->mg_pll_div1); in icl_mg_pll_write()
9399 #define MG_PLL_DIV1(port) _MMIO_PORT((port) - PORT_C, _MG_PLL_DIV1_PORT1, \ macro
