Searched refs:MDIO_CTRL1_RESET (Results 1 – 7 of 7) sorted by relevance
81 pcs_value |= MDIO_CTRL1_RESET; in vfio_platform_amdxgbe_reset()89 } while ((pcs_value & MDIO_CTRL1_RESET) && --count); in vfio_platform_amdxgbe_reset()91 if (pcs_value & MDIO_CTRL1_RESET) in vfio_platform_amdxgbe_reset()
42 ef4_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); in ef4_mdio_reset_mmd()49 } while (spins && (ctrl & MDIO_CTRL1_RESET)); in ef4_mdio_reset_mmd()96 if (stat & MDIO_CTRL1_RESET) in ef4_mdio_wait_reset_mmds()
658 reg |= MDIO_CTRL1_RESET; in xgbe_phy_reset()665 } while ((reg & MDIO_CTRL1_RESET) && --count); in xgbe_phy_reset()667 if (reg & MDIO_CTRL1_RESET) in xgbe_phy_reset()
80 #define MDIO_CTRL1_RESET BMCR_RESET macro
421 MDIO_CTRL1_RESET); in ixgbe_reset_phy_generic()447 if (!(ctrl & MDIO_CTRL1_RESET)) { in ixgbe_reset_phy_generic()454 if (ctrl & MDIO_CTRL1_RESET) { in ixgbe_reset_phy_generic()988 (phy_data | MDIO_CTRL1_RESET)); in ixgbe_reset_phy_nl()993 if ((phy_data & MDIO_CTRL1_RESET) == 0) in ixgbe_reset_phy_nl()998 if ((phy_data & MDIO_CTRL1_RESET) != 0) { in ixgbe_reset_phy_nl()
1170 MDIO_CTRL1_RESET); in ixgb_optics_reset()
358 MDIO_CTRL1_RESET); in t3_phy_reset()366 ctl &= MDIO_CTRL1_RESET; in t3_phy_reset()
