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/Linux-v4.19/drivers/net/phy/
DKconfig6 tristate "MDIO bus device drivers"
8 MDIO devices and driver infrastructure code.
22 tristate "Broadcom iProc MDIO bus controller"
26 This module provides a driver for the MDIO busses found in the
30 tristate "Broadcom UniMAC MDIO bus controller"
33 This module provides a driver for the Broadcom UniMAC MDIO busses.
39 tristate "Bitbanged MDIO buses"
41 This module implements the MDIO bus protocol in software,
51 This module provides a driver framework for MDIO bus
52 multiplexers which connect one of several child MDIO busses
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/Linux-v4.19/Documentation/devicetree/bindings/net/
Dmarvell-orion-mdio.txt1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
12 - reg: address and length of the MDIO registers. When an interrupt is
19 - clocks: phandle for up to three required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
33 * System Management Interface (SMI) / MDIO Nexus
48 - ranges: As needed for mapping of the MDIO bus device registers.
50 - assigned-addresses: As needed for mapping of the MDIO bus device registers.
Dhisilicon-hns-mdio.txt1 Hisilicon MDIO bus controller
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
Dmscc-miim.txt1 Microsemi MII Management Controller (MIIM) / MDIO
6 - reg: The base address of the MDIO bus controller register bank. Optionally, a
10 - #size-cells: Must be <0>. MDIO addresses have no size component.
13 Typically an MDIO bus might have several children.
Dbrcm,mdio-mux-iproc.txt1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
3 This MDIO bus multiplexer defines buses that could be internal as well as
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
6 properties as well to generate desired MDIO transaction on appropriate bus.
10 MDIO multiplexer node:
Dmdio.txt1 Common MDIO bus properties.
3 These are generic properties that can apply to any MDIO bus.
6 - reset-gpios: One GPIO that control the RESET lines of all PHYs on that MDIO
19 required for the TI Davinci MDIO driver.
Dmdio-gpio.txt1 MDIO on GPIOs
6 MDC and MDIO lines connected to GPIO controllers are listed in the
9 MDC, MDIO.
Dbrcm,iproc-mdio.txt1 * Broadcom iProc MDIO bus controller
5 - reg: address and length of the register set for the MDIO interface
9 Child nodes of this MDIO bus controller node are standard Ethernet PHY device
Dmdio-mux.txt1 Common MDIO bus multiplexer/switch properties.
3 An MDIO bus multiplexer/switch will have several child busses that are
4 numbered uniquely in a device dependent manner. The nodes for an MDIO
12 - mdio-parent-bus : phandle to the parent MDIO bus.
24 /* The parent MDIO bus. */
Dbrcm,unimac-mdio.txt1 * Broadcom UniMAC MDIO bus controller
9 larger than 16-bits MDIO transactions
16 Ethernet switch this MDIO block is integrated from, or must be two, if there
23 Child nodes of this MDIO bus controller node are standard Ethernet PHY device
Dapm-xgene-mdio.txt1 APM X-Gene SoC MDIO node
3 MDIO node is defined to describe on-chip MDIO controller.
Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
68 /* The parent MDIO bus. */
Dfsl-fman.txt10 - FMan MDIO Node
362 FMan MDIO Node
366 The MDIO is a bus to which the PHY devices are connected.
374 Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
375 Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
376 Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
387 Definition: Specifies the external MDIO bus clock speed to
394 Usage: required for external MDIO
396 Definition: Event interrupt of external MDIO controller.
399 Usage: required for internal MDIO
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Dbrcm,bcmgenet.txt28 when operating in a RGMII to RGMII type of connection, or when the MDIO bus is
38 MDIO bus node required properties:
45 - #address-cells: address cell for MDIO bus addressing, should be 1
46 - #size-cells: size of the cells for MDIO bus addressing, should be 0
100 External MDIO-connected Gigabit PHY/switch:
Dmdio-mux-gpio.txt1 Properties for an MDIO bus multiplexer/switch controlled by GPIO pins.
3 This is a special case of a MDIO bus multiplexer. One or more GPIO
14 /* The parent MDIO bus. */
Dethernet.txt60 "auto", "in-band-status". "auto" is the default, it usess MDIO for
64 connected via the MDIO bus (sometimes the MDIO bus controller is separate).
66 For non-MDIO PHY management see fixed-link.txt.
/Linux-v4.19/arch/powerpc/boot/dts/
Dkmeter1.dts152 0 1 3 0 2 0 /* MDIO */
178 0 1 3 0 2 0 /* MDIO */
204 0 1 3 0 2 0 /* MDIO */
224 0 1 3 0 2 0 /* MDIO */
242 0 1 3 0 2 0 /* MDIO */
260 0 1 3 0 2 0 /* MDIO */
278 0 1 3 0 2 0 /* MDIO */
318 /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */
334 /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */
350 /* Piggy2 (UCC4, MDIO 0x00, RMII) */
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/Linux-v4.19/Documentation/devicetree/bindings/phy/
Dbrcm,mdio-mux-bus-pci.txt4 - reg: MDIO Bus number for the MDIO interface
10 - reg: MDIO Phy ID for the MDIO interface
/Linux-v4.19/Documentation/devicetree/bindings/net/dsa/
Drealtek-smi.txt5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
6 not use the MDIO protocol. This binding defines how to specify the
23 - mdio-gpios: GPIO line for the MDIO data line.
50 This defines the internal MDIO bus of the SMI device, mostly for the
58 See net/mdio.txt for additional MDIO bus properties.
67 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
Ddsa.txt61 - phy-handle : Phandle to a PHY on an MDIO bus. See
69 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
76 The following example shows three switches on three MDIO busses,
266 of an MDIO bus for management.
270 - #address-cells : Must be 2, first cell is the address on the MDIO bus
275 - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
316 - phy-handle : Phandle to a PHY on an external MDIO bus, not the
326 - mii-bus : Should be a phandle to a valid MDIO bus device node.
331 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
350 reg = <16 0>; /* MDIO address 16, switch 0 in tree */
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Dmarvell.txt10 Marvell Switches are MDIO devices. The following properties should be
17 which is at a different MDIO base address in different switch families.
41 - mdio : Container of PHY and devices on the switches MDIO
43 - mdio? : Container of PHYs and devices on the external MDIO
/Linux-v4.19/drivers/net/ethernet/freescale/
DKconfig45 bool "FEC MPC52xx MDIO bus driver"
60 tristate "Freescale PQ MDIO"
63 This driver supports the MDIO bus used by the gianfar and UCC drivers.
66 tristate "Freescale XGMAC MDIO"
71 This driver supports the MDIO bus on the Fman 10G Ethernet MACs, and
/Linux-v4.19/drivers/net/ethernet/freescale/fs_enet/
DKconfig28 tristate "MDIO driver for FEC"
32 tristate "MDIO driver for FCC"
/Linux-v4.19/Documentation/networking/dsa/
Ddsa.txt191 Slave MDIO bus
195 slave MDIO bus which allows a specific switch driver to divert and intercept
196 MDIO reads/writes towards specific PHY addresses. In most MDIO-connected
202 For Ethernet switches which have both external and internal MDIO busses, the
203 slave MII bus can be utilized to mux/demux MDIO reads and writes towards either
204 internal or external MDIO devices this switch might be connected to: internal
250 - supporting non-MDIO and non-MMIO (platform) switches is not possible
267 can make it harder to debug MDIO switch connected using xMII interfaces
295 - MDIO/PHY library: drivers/net/phy/phy.c, mdio_bus.c
299 MDIO/PHY library
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