Searched refs:MC_VM_L1_TLB_MCB_WR_SEM_CNTL (Results 1 – 2 of 2) sorted by relevance
1162 WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE); in r600_pcie_gart_enable()1206 WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp); in r600_pcie_gart_disable()1252 WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE); in r600_agp_enable()
364 #define MC_VM_L1_TLB_MCB_WR_SEM_CNTL 0x2220 macro
