Searched refs:MAX_PHASE (Results 1 – 7 of 7) sorted by relevance
623 idx &= MAX_PHASE; in get_phase_point()631 for (i = 0; i < MAX_PHASE + 1; i++) { in get_phase_len()635 return MAX_PHASE + 1; in get_phase_len()649 while (start < MAX_PHASE + 1) { in sd_search_final_phase()658 final_phase = (start_final + len_final / 2) & MAX_PHASE; in sd_search_final_phase()708 for (i = MAX_PHASE; i >= 0; i--) { in sd_tuning_phase()
614 for (phase += period; phase < MAX_PHASE; phase += period) in uhci_highest_load()633 int max_phase = min_t(int, MAX_PHASE, qh->period); in uhci_check_bandwidth()665 for (i = qh->phase; i < MAX_PHASE; i += qh->period) { in uhci_reserve_bandwidth()670 uhci->total_load / MAX_PHASE; in uhci_reserve_bandwidth()698 for (i = qh->phase; i < MAX_PHASE; i += qh->period) { in uhci_release_bandwidth()703 uhci->total_load / MAX_PHASE; in uhci_release_bandwidth()1102 qh->phase = (qh->period / 2) & (MAX_PHASE - 1); in uhci_submit_interrupt()
95 #define MAX_PHASE 32 /* Periodic scheduling length */ macro449 short load[MAX_PHASE]; /* Periodic allocations */
399 for (i = 0; i < MAX_PHASE; ++i) { in uhci_sprint_schedule()
227 #define MAX_PHASE 31 macro
1698 struct timing_phase_path path[MAX_PHASE + 1];1716 for (i = 0; i < MAX_PHASE + 1; i++) {1750 (path[cont_path_cnt - 1].end == MAX_PHASE)) {1751 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1;1755 path[0].mid += MAX_PHASE + 1;1788 MAX_PHASE + 1);1801 MAX_PHASE + 1);1838 for (j = MAX_PHASE; j >= 0; j--) {1885 for (i = MAX_PHASE; i >= 0; i--) {1955 for (j = MAX_PHASE; j >= 0; j--) {
43 #define MAX_PHASE 15 macro
