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/Linux-v4.19/arch/arm64/boot/dts/freescale/
Dfsl-ls208xa.dtsi138 interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
214 interrupts = <0 32 0x4>; /* Level high type */
221 interrupts = <0 32 0x4>; /* Level high type */
478 interrupts = <0 26 0x4>; /* Level high type */
489 interrupts = <0 28 0x4>; /* Level high type */
500 interrupts = <0 36 0x4>; /* Level high type */
511 interrupts = <0 36 0x4>; /* Level high type */
522 interrupts = <0 37 0x4>; /* Level high type */
533 interrupts = <0 37 0x4>; /* Level high type */
547 interrupts = <0 34 0x4>; /* Level high type */
[all …]
/Linux-v4.19/Documentation/isdn/
D00-INDEX8 - description of isdn4linux Link Level and Hardware Level interfaces.
12 - description of kernel CAPI Link Level to Hardware Level interface.
/Linux-v4.19/Documentation/devicetree/bindings/interrupt-controller/
Dintel,ce4100-ioapic.txt19 1 - Level Low
20 2 - Level High
Dbrcm,bcm3380-l2-intc.txt1 Broadcom BCM3380-style Level 1 / Level 2 interrupt controller
Dsifive,plic-1.0.0.txt1 SiFive Platform-Level Interrupt Controller (PLIC)
4 SiFive SOCs include an implementation of the Platform-Level Interrupt Controller
Dbrcm,l2-intc.txt1 Broadcom Generic Level 2 Interrupt Controller
Dabilis,tb10x-ictl.txt1 TB10x Top Level Interrupt Controller
/Linux-v4.19/Documentation/media/dvb-drivers/
Dci.rst83 With the High Level CI approach any new card with almost any random
134 With this High Level CI interface, the interface can be defined with the
171 Descriptors(Program Level)=[ 09 06 06 04 05 50 ff f1]
208 | | | High Level CI driver
228 The High Level CI interface uses the EN50221 DVB standard, following a
/Linux-v4.19/arch/arc/kernel/
Dentry-compact.S148 ; Level 2 ISR: Can interrupt a Level 1 ISR
226 ; Level 1 ISR
345 ; Returning from Interrupts (Level 1 or 2)
349 ; Level 2 interrupt return Path - from hardware standpoint
Dctx_sw_asm.S19 ;################### Low Level Context Switch ##########################
/Linux-v4.19/Documentation/devicetree/bindings/sound/
Dcs35l32.txt8 of the AD0 pin. Level 0 is 0x40 while Level 1 is 0x41.
/Linux-v4.19/drivers/net/wireless/realtek/rtl818x/
DKconfig21 Level-One WPC-0101
69 Level 1 WNC-0301USB
/Linux-v4.19/arch/powerpc/boot/dts/
Ddigsy_mtc.dts145 interrupts = <1 2 3>; // Level-low
152 interrupts = <1 2 3>; // Level-low
Dmvme5100.dts61 interrupts = <1 1>; // IRQ1 Level Active Low.
72 interrupts = <1 1>; // IRQ1 Level Active Low.
/Linux-v4.19/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.txt3 LLCC (Last Level Cache Controller) provides last level of cache memory in SOC,
/Linux-v4.19/Documentation/devicetree/bindings/nds32/
Datl2c.txt5 Level-2 cache controller in general enhances overall system performance
/Linux-v4.19/Documentation/power/regulator/
Doverview.txt89 Regulator Level: This is defined by the regulator hardware
97 Power Domain Level: This is defined in software by kernel
105 Consumer Level: This is defined by consumer drivers
/Linux-v4.19/Documentation/devicetree/bindings/gpio/
Dgpio-mpc8xxx.txt33 interrupts = <0 36 0x4>; /* Level high type */
Dgpio-xra1403.txt11 - Output Level Control
/Linux-v4.19/Documentation/filesystems/ext4/ondisk/
Doverview.rst3 High Level Design
/Linux-v4.19/Documentation/media/uapi/v4l/
Dextended-controls.rst896 - Level 1.0
898 - Level 1B
900 - Level 1.1
902 - Level 1.2
904 - Level 1.3
906 - Level 2.0
908 - Level 2.1
910 - Level 2.2
912 - Level 3.0
914 - Level 3.1
[all …]
/Linux-v4.19/Documentation/networking/
Dfib_trie.txt12 indexed through a subset of the key. See Level Compression.
18 child array - the "child index". See Level Compression.
35 Level Compression / child arrays
/Linux-v4.19/Documentation/devicetree/bindings/mips/cavium/
Dsata-uctl.txt8 buffers from Level 2 Cache.
/Linux-v4.19/Documentation/devicetree/bindings/regulator/
Dqcom,rpmh-regulator.txt30 First Level Nodes - PMIC
89 Second Level Nodes - Regulators
/Linux-v4.19/Documentation/input/devices/
Diforce-protocol.rst148 04 Level at end of attack. Signed byte.
150 07 Level at end of fade.
160 02 Level. Signed byte.

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