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Searched refs:LR (Results 1 – 24 of 24) sorted by relevance

/Linux-v4.19/drivers/video/fbdev/matrox/
Dmatroxfb_maven.c522 #define LR(x) maven_set_reg(c, (x), m->regs[(x)]) macro
547 LR(0x00); LR(0x01); LR(0x02); LR(0x03); in maven_init_TV()
549 LR(0x04); in maven_init_TV()
551 LR(0x2C); in maven_init_TV()
552 LR(0x08); in maven_init_TV()
553 LR(0x0A); in maven_init_TV()
554 LR(0x09); in maven_init_TV()
555 LR(0x29); in maven_init_TV()
558 LR(0x0B); in maven_init_TV()
559 LR(0x0C); in maven_init_TV()
[all …]
Dmatroxfb_g450.c502 #define LR(x) cve2_set_reg(minfo, (x), m->regs[(x)]) macro
508 LR(0x80); in cve2_init_TV()
509 LR(0x82); LR(0x83); in cve2_init_TV()
510 LR(0x84); LR(0x85); in cve2_init_TV()
515 LR(i); in cve2_init_TV()
/Linux-v4.19/arch/arm/kernel/
Dentry-ftrace.S100 @ OLD_R0 will overwrite previous LR
105 str lr, [sp, #0] @ store LR instead of PC
107 ldr lr, [sp, #8] @ get previous LR
109 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
116 @ R0 | R1 | ... | LR | SP + 4 | previous LR | LR | PSR | OLD_R0 |
126 ldr lr, [sp, #S_PC] @ get LR
143 ldr lr, [sp, #4] @ restore LR
163 ldr lr, [sp, #4] @ restore LR
Dunwind.c88 LR = 14, enumerator
353 ctrl->vrs[PC] = ctrl->vrs[LR]; in unwind_exec_insn()
378 ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); in unwind_exec_insn()
412 ctrl.vrs[LR] = frame->lr; in unwind_frame()
457 ctrl.vrs[PC] = ctrl.vrs[LR]; in unwind_frame()
465 frame->lr = ctrl.vrs[LR]; in unwind_frame()
Dentry-header.S172 @ Store/load the USER SP and LR registers by switching to the SYS
Dentry-armv.S276 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
/Linux-v4.19/tools/perf/arch/arm/tests/
Dregs_load.S18 #define LR 0x70 macro
55 str lr, [r0, #LR]
/Linux-v4.19/arch/powerpc/kernel/
Dswsusp_asm64.S90 SAVE_SPECIAL(LR)
137 RESTORE_SPECIAL(LR)
271 RESTORE_SPECIAL(LR)
/Linux-v4.19/Documentation/devicetree/bindings/display/panel/
Dsharp,ls037v7dw01.txt14 ordered MO, LR, and UD as specified in the LS037V7DW01.pdf file.
35 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
/Linux-v4.19/Documentation/networking/
Dixgbe.txt49 LR Modules
50 Intel DUAL RATE 1G/10G SFP+ LR (bailed) FTLX1471D3BCV-IT
51 Intel DUAL RATE 1G/10G SFP+ LR (bailed) AFCT-701SDDZ-IN1
52 Intel DUAL RATE 1G/10G SFP+ LR (bailed) AFCT-701SDZ-IN2
61 Finisar SFP+ LR bailed, 10g single rate FTLX1471D3BCL
65 Finisar DUAL RATE 1G/10G SFP+ LR (No Bail) FTLX1471D3QCV-IT
66 Avago DUAL RATE 1G/10G SFP+ LR (No Bail) AFCT-701SDZ-IN1
88 - LAN on Motherboard (LOMs) may support DA, SR, or LR modules. Other module
98 Finisar SFP+ LR bailed, 10g single rate FTLX1471D3BCL
Dixgb.txt56 82597EX Intel(R) PRO/10GbE LR/SR/CX4 10G Base-LR (1310 nm optical fiber)
/Linux-v4.19/arch/arm/lib/
Dbacktrace.S69 bic sv_pc, sv_pc, mask @ mask PC/LR for the mode
79 bic r1, r1, mask @ mask PC/LR for the mode
/Linux-v4.19/tools/perf/arch/arm/util/
Dunwind-libdw.c33 dwarf_regs[14] = REG(LR); in libdw__arch_set_initial_registers()
/Linux-v4.19/arch/arm/mm/
Dproc-v7m.S136 mov r6, lr @ save LR
144 mov lr, r6 @ restore LR
/Linux-v4.19/net/ieee802154/
DKconfig10 Say Y here to compile LR-WPAN support into the kernel or say M to
/Linux-v4.19/tools/perf/arch/arm64/util/
Dunwind-libdw.c49 dwarf_regs[30] = REG(LR); in libdw__arch_set_initial_registers()
/Linux-v4.19/arch/powerpc/platforms/52xx/
Dlite5200_sleep.S69 SAVE_SPRN(LR, 0x1c)
247 LOAD_SPRN(LR, 0x1c)
/Linux-v4.19/tools/testing/selftests/powerpc/switch_endian/
Dcheck.S26 addi r9,r15,32 # check LR
/Linux-v4.19/arch/arm/boot/dts/
Domap3-evm-common.dtsi105 &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */
/Linux-v4.19/Documentation/powerpc/
Dsyscall64-abi.txt29 stack frame LR and CR save fields are not used.
Dtransactional_memory.txt62 Checkpointed registers include all GPRs, FPRs, VRs/VSRs, LR, CCR/CR, CTR, FPCSR
/Linux-v4.19/arch/powerpc/platforms/8xx/
DKconfig129 (by not placing conditional branches or branches to LR or CTR
/Linux-v4.19/Documentation/livepatch/
Dlivepatch.txt450 Each function has to handle TOC and save LR before it could call
/Linux-v4.19/Documentation/s390/
DDebugging390.txt772 0001AFF8' LR 180F CC 0