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Searched refs:LCPLL_CTL (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_cdclk.c406 uint32_t lcpll = I915_READ(LCPLL_CTL); in hsw_get_cdclk()
673 uint32_t lcpll = I915_READ(LCPLL_CTL); in bdw_get_cdclk()
704 if (WARN((I915_READ(LCPLL_CTL) & in bdw_set_cdclk()
721 val = I915_READ(LCPLL_CTL); in bdw_set_cdclk()
723 I915_WRITE(LCPLL_CTL, val); in bdw_set_cdclk()
729 if (wait_for_us(I915_READ(LCPLL_CTL) & in bdw_set_cdclk()
733 val = I915_READ(LCPLL_CTL); in bdw_set_cdclk()
754 I915_WRITE(LCPLL_CTL, val); in bdw_set_cdclk()
756 val = I915_READ(LCPLL_CTL); in bdw_set_cdclk()
758 I915_WRITE(LCPLL_CTL, val); in bdw_set_cdclk()
[all …]
Dintel_display.c9044 val = I915_READ(LCPLL_CTL); in hsw_disable_lcpll()
9048 I915_WRITE(LCPLL_CTL, val); in hsw_disable_lcpll()
9050 if (wait_for_us(I915_READ(LCPLL_CTL) & in hsw_disable_lcpll()
9054 val = I915_READ(LCPLL_CTL); in hsw_disable_lcpll()
9058 I915_WRITE(LCPLL_CTL, val); in hsw_disable_lcpll()
9059 POSTING_READ(LCPLL_CTL); in hsw_disable_lcpll()
9061 if (intel_wait_for_register(dev_priv, LCPLL_CTL, LCPLL_PLL_LOCK, 0, 1)) in hsw_disable_lcpll()
9074 val = I915_READ(LCPLL_CTL); in hsw_disable_lcpll()
9076 I915_WRITE(LCPLL_CTL, val); in hsw_disable_lcpll()
9077 POSTING_READ(LCPLL_CTL); in hsw_disable_lcpll()
[all …]
Dintel_dpll_mgr.c1883 uint32_t val = I915_READ(LCPLL_CTL); in intel_ddi_pll_init()
Di915_reg.h9207 #define LCPLL_CTL _MMIO(0x130040) macro
/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dhandlers.c2246 MMIO_DH(LCPLL_CTL, D_ALL, NULL, lcpll_ctl_mmio_write); in init_generic_mmio_info()