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/Linux-v4.19/arch/alpha/lib/
Dev67-strncat.S58 bsr $23, __stxncpy # L0 :/* Now do the append. */
65 ret # L0 :
81 ret # L0 :
87 ret # L0 :
93 ret # L0 :
Dev6-memset.S214 ret $31,($26),1 # L0 :
231 ret $31,($26),1 # L0 :
392 ret $31,($26),1 # L0 :
409 ret $31,($26),1 # L0 :
580 ret $31,($26),1 # L0 :
597 ret $31,($26),1 # L0 :
Dev6-divide.S208 ret $31,($23),1 # L0 : L U U L
246 bsr $23,ufunction # L0: L U L U
261 ret $31,($23),1 # L0 : L U U L
Dev6-memchr.S96 ret # L0 : L U L U
120 ret # L0 : L U L U
190 ret # L0 :
Dev6-memcpy.S87 ldq $6, 0($17) # L0 : bytes 0..7
176 ret $31, ($26), 1 # L0 :
240 ret $31, ($26), 1 # L0 :
Dev6-stxncpy.S133 ret (t9) # L0 : Latency=3
140 br $a_eos # L0 : Latency=3
312 ret (t9) # L0 : Latency=3
333 br $u_final # L0 : Latency=3
393 ret (t9) # L0 : Latency=3
Dev67-strlen.S48 ret $31, ($26) # L0 :
Dev67-strcat.S53 br __stxcpy # L0 :
Dev6-copy_user.S119 br $31, $dirtyentry # L0 .. .. .. : L U U L
224 ret $31,($26),1 # L0 .. .. .. : L U L U
Dev6-stxcpy.S109 ret (t9) # L0 : Latency=3
135 br stxcpy_aligned # L0 : Latency=3
259 ret (t9) # L0 : Latency=3
Dev67-strchr.S87 ret # L0 :
Dev6-csum_ipv6_magic.S150 ret # L0 : L U L U
Dev67-strrchr.S106 ret # L0 : Latency=3
/Linux-v4.19/drivers/cpufreq/
Ds5pv210-cpufreq.c113 L0, L1, L2, L3, L4, enumerator
128 {0, L0, 1000*1000},
148 [L0] = {
267 if ((index == L0) || (priv_index == L0)) in s5pv210_target()
386 if (index == L0) in s5pv210_target()
/Linux-v4.19/arch/xtensa/lib/
Dmemset.S47 .L0: # return here from .Ldstunaligned when dst is aligned label
113 bbci.l a5, 1, .L0 # if now aligned, return to main algorithm
120 j .L0 # dst is now aligned, return to main algorithm
/Linux-v4.19/arch/sh/lib/
D__clear_user.S36 .L0: dt r3 define
38 bf/s .L0
/Linux-v4.19/arch/sparc/net/
Dbpf_jit_64.h20 #define L0 0x10 macro
/Linux-v4.19/arch/arm/mach-omap2/
Dsram243x.S76 mov r9, #0x0 @ shift back to L0-voltage
81 str r3, [r2] @ go to L0-freq operation
115 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
210 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
Dsram242x.S76 mov r9, #0x0 @ shift back to L0-voltage
81 str r3, [r2] @ go to L0-freq operation
115 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
210 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
/Linux-v4.19/Documentation/devicetree/bindings/riscv/
Dcpus.txt104 next-level-cache = <&L15 &L0>;
129 next-level-cache = <&L15 &L0>;
/Linux-v4.19/Documentation/virtual/kvm/
Dnested-vmx.txt30 L0, the guest hypervisor, which we call L1, and its nested guest, which we
69 also have "vmcs01", the VMCS that L0 built for L1, and "vmcs02" is the VMCS
70 which L0 builds to actually run L2 - how this is done is explained in the
/Linux-v4.19/Documentation/translations/zh_CN/arm64/
Dmemory.txt91 | +-------------------------------> [47:39] L0 索引
/Linux-v4.19/arch/sh/lib64/
Dcopy_user_memcpy.S73 movi (L1-L0+63*32 + 1) & 0xffff,r1
75 L0: ptrel r0,tr0 label
Dmemcpy.S58 movi (L1-L0+63*32 + 1) & 0xffff,r1
60 L0: ptrel r0,tr0 label
/Linux-v4.19/Documentation/arm64/
Dmemory.txt71 | +-------------------------------> [47:39] L0 index

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