Searched refs:JZ4740_CLK_PLL_HALF (Results 1 – 2 of 2) sorted by relevance
| /Linux-v4.19/drivers/clk/ingenic/ |
| D | jz4740-cgu.c | 90 [JZ4740_CLK_PLL_HALF] = {
122 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
129 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
135 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
151 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
158 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 },
165 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 },
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| /Linux-v4.19/include/dt-bindings/clock/ |
| D | jz4740-cgu.h | 18 #define JZ4740_CLK_PLL_HALF 3 macro
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