Searched refs:IS_GEN9_LP (Results 1 – 25 of 25) sorted by relevance
335 if (IS_GEN9_LP(dev_priv)) { in intel_dsi_compute_config()555 else if (IS_GEN9_LP(dev_priv)) in intel_dsi_device_ready()636 i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ? in vlv_dsi_clear_device_ready()656 if ((IS_GEN9_LP(dev_priv) || port == PORT_A) && in vlv_dsi_clear_device_ready()682 if (IS_GEN9_LP(dev_priv)) { in intel_dsi_port_enable()700 i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ? in intel_dsi_port_enable()733 i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ? in intel_dsi_port_disable()817 if (IS_GEN9_LP(dev_priv)) { in intel_dsi_pre_enable()990 if (IS_GEN9_LP(dev_priv)) { in intel_dsi_post_disable()1037 if (IS_GEN9_LP(dev_priv) && !bxt_dsi_pll_is_enabled(dev_priv)) in intel_dsi_get_hw_state()[all …]
342 sseu->max_slices = IS_GEN9_LP(dev_priv) ? 1 : 3; in gen9_sseu_info_init()343 sseu->max_subslices = IS_GEN9_LP(dev_priv) ? 3 : 4; in gen9_sseu_info_init()412 !IS_GEN9_LP(dev_priv) && hweight8(sseu->slice_mask) > 1; in gen9_sseu_info_init()414 IS_GEN9_LP(dev_priv) && sseu_subslice_total(sseu) > 1; in gen9_sseu_info_init()417 if (IS_GEN9_LP(dev_priv)) { in gen9_sseu_info_init()674 freq = IS_GEN9_LP(dev_priv) ? f19_2_mhz : f24_mhz; in read_timestamp_frequency()
96 else if (IS_GEN9_LP(dev_priv)) in get_gmbus_pin()115 else if (IS_GEN9_LP(dev_priv)) in intel_gmbus_is_valid_pin()581 if (IS_GEN9_LP(dev_priv)) in do_gmbus_xfer()691 if (IS_GEN9_LP(dev_priv)) in do_gmbus_xfer()
928 } else if (IS_GEN9_LP(dev_priv)) { in intel_ddi_hdmi_level()1667 else if (IS_GEN9_LP(dev_priv)) in intel_ddi_clock_get()1986 if (ret && IS_GEN9_LP(dev_priv)) { in intel_ddi_get_hw_state()2171 } else if (IS_GEN9_LP(dev_priv)) { in intel_ddi_dp_voltage_max()2699 else if (IS_GEN9_LP(dev_priv)) in intel_ddi_pre_enable_dp()2735 else if (IS_GEN9_LP(dev_priv)) in intel_ddi_pre_enable_hdmi()3248 if (IS_GEN9_LP(dev_priv)) in intel_ddi_get_config()3289 if (IS_GEN9_LP(dev_priv) && ret) in intel_ddi_compute_config()3496 if (IS_GEN9_LP(dev_priv)) in intel_ddi_a_force_4_lanes()3587 if (IS_GEN9_LP(dev_priv)) in intel_ddi_init()
81 if (IS_GEN9_LP(i915)) in context_reserved_size()
112 if (IS_GEN9_LP(dev_priv)) in guc_prepare_xfer()
186 } else if (IS_GEN9_LP(dev_priv)) { in get_mocs_settings()
303 if (IS_GEN9_LP(dev_priv)) in gen9_ctx_workarounds_init()623 if (IS_GEN9_LP(dev_priv)) { in gen9_gt_workarounds_apply()
306 } else if (IS_GEN9_LP(dev_priv)) { in intel_dp_set_source_rates()783 !IS_GEN9_LP(dev_priv))) in intel_power_sequencer_reset()804 if (IS_GEN9_LP(dev_priv)) in intel_power_sequencer_reset()827 if (IS_GEN9_LP(dev_priv)) in intel_pps_get_registers()836 if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv) && in intel_pps_get_registers()3543 if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) { in intel_dp_set_signal_levels()4602 else if (IS_GEN9_LP(dev_priv)) in intel_digital_port_connected()5396 if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv) && in intel_pps_readout_hw_state()5415 if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) || in intel_pps_readout_hw_state()5587 if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) || in intel_dp_init_panel_power_sequencer_registers()[all …]
1633 if (IS_GEN9_LP(dev_priv) || hibernation || !suspend_to_idle(dev_priv) || in i915_drm_suspend_late()1640 if (IS_GEN9_LP(dev_priv)) in i915_drm_suspend_late()1836 if (IS_GEN9_LP(dev_priv)) { in i915_drm_resume_early()2611 if (IS_GEN9_LP(dev_priv)) { in intel_runtime_suspend()2696 if (IS_GEN9_LP(dev_priv)) { in intel_runtime_resume()
218 if (IS_GEN9_LP(dev_priv)) in gen9_set_dc_state_debugmask()
574 if (IS_GEN9_LP(dev_priv)) in gen9_dc_mask()805 if (IS_GEN9_LP(dev_priv)) in gen9_dc_off_power_well_enable()2773 } else if (IS_GEN9_LP(dev_priv)) { in get_allowed_dc_mask()3554 } else if (IS_GEN9_LP(dev_priv)) { in intel_power_domains_init_hw()3597 else if (IS_GEN9_LP(dev_priv)) in intel_power_domains_suspend()
2797 if (IS_GEN9_LP(dev_priv)) { in gen8_de_irq_handler()2813 if (IS_GEN9_LP(dev_priv) && (iir & BXT_DE_PORT_GMBUS)) { in gen8_de_irq_handler()4169 if (IS_GEN9_LP(dev_priv)) in gen8_de_irq_postinstall()4185 if (IS_GEN9_LP(dev_priv)) in gen8_de_irq_postinstall()4213 } else if (IS_GEN9_LP(dev_priv)) { in gen8_de_irq_postinstall()4856 if (IS_GEN9_LP(dev_priv)) in intel_irq_init()
94 if (IS_GEN9_LP(dev_priv)) in intel_dp_mst_compute_config()
2792 } else if (IS_GEN9_LP(dev_priv)) { in intel_init_cdclk_hooks()2815 else if (IS_GEN9_LP(dev_priv)) in intel_init_cdclk_hooks()
1534 if (IS_GEN9_LP(dev_priv) && clock > 223333 && clock < 240000) in hdmi_port_clock_valid()2294 else if (IS_GEN9_LP(dev_priv)) in intel_hdmi_ddc_pin()
1126 if (IS_GEN9_LP(dev_priv)) { in i915_frequency_info()1233 max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 0 : in i915_frequency_info()1246 max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 16 : in i915_frequency_info()4365 if (IS_GEN9_LP(dev_priv)) { in gen9_sseu_device_status()
2224 else if (IS_GEN9_LP(dev_priv)) in gtt_write_workarounds()3070 if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) in ggtt_probe_common()3367 else if (IS_CHERRYVIEW(dev_priv) || IS_GEN9_LP(dev_priv)) in setup_private_pat()
2073 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv))) in intel_bios_is_port_hpd_inverted()
1845 if (IS_GEN9_LP(dev_priv)) { in intel_panel_init_backlight_funcs()
623 !IS_CHERRYVIEW(dev_priv) && !IS_GEN9_LP(dev_priv)) in intel_PLL_is_valid()628 !IS_GEN9_LP(dev_priv)) { in intel_PLL_is_valid()9460 else if (IS_GEN9_LP(dev_priv)) in haswell_get_ddi_port_state()9507 if (IS_GEN9_LP(dev_priv) && in haswell_get_pipe_config()14119 if (HAS_PCH_SPLIT(dev_priv) || IS_GEN9_LP(dev_priv)) in intel_pps_init()14153 } else if (IS_GEN9_LP(dev_priv)) { in intel_setup_outputs()
2496 #define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv)) macro
3212 else if (IS_GEN9_LP(dev_priv)) in intel_shared_dpll_init()
6743 IS_GEN9_LP(i915) && !bxt_check_bios_rc6_setup(i915)) { in sanitize_rc6()6767 if (IS_GEN9_LP(dev_priv)) { in gen6_init_rps_frequencies()9730 if (IS_GEN9_LP(dev_priv)) { in intel_rc6_residency_ns()
3838 (IS_GEN9_LP(dev_priv) ? \3847 (IS_GEN9_LP(dev_priv) ? \
