Home
last modified time | relevance | path

Searched refs:IS_CANNONLAKE (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_csr.c304 } else if (IS_CANNONLAKE(dev_priv)) { in parse_csr_fw()
461 else if (IS_CANNONLAKE(dev_priv)) in intel_csr_ucode_init()
Dintel_workarounds.c536 else if (IS_CANNONLAKE(dev_priv)) in intel_ctx_workarounds_init()
928 else if (IS_CANNONLAKE(dev_priv)) in intel_gt_workarounds_apply()
1040 else if (IS_CANNONLAKE(i915)) in whitelist_build()
Dintel_ddi.c925 } else if (IS_CANNONLAKE(dev_priv)) { in intel_ddi_hdmi_level()
1669 else if (IS_CANNONLAKE(dev_priv)) in intel_ddi_clock_get()
2166 } else if (IS_CANNONLAKE(dev_priv)) { in intel_ddi_dp_voltage_max()
2516 else if (IS_CANNONLAKE(dev_priv)) in bxt_signal_levels()
2618 } else if (IS_CANNONLAKE(dev_priv)) { in intel_ddi_clk_select()
2659 } else if (IS_CANNONLAKE(dev_priv)) { in intel_ddi_clk_disable()
2697 else if (IS_CANNONLAKE(dev_priv)) in intel_ddi_pre_enable_dp()
2733 else if (IS_CANNONLAKE(dev_priv)) in intel_ddi_pre_enable_hdmi()
3135 if (IS_CANNONLAKE(dev_priv) && crtc_state->port_clock > 594000) in intel_ddi_compute_min_voltage_level()
3504 if (IS_CANNONLAKE(dev_priv) && in intel_ddi_a_force_4_lanes()
Dintel_mocs.c181 if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv) || in get_mocs_settings()
Dintel_cdclk.c2184 if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) { in intel_crtc_compute_min_cdclk()
2580 } else if (IS_CANNONLAKE(dev_priv)) { in intel_update_max_cdclk()
2800 } else if (IS_CANNONLAKE(dev_priv)) { in intel_init_cdclk_hooks()
2811 else if (IS_CANNONLAKE(dev_priv)) in intel_init_cdclk_hooks()
Dintel_runtime_pm.c413 if (IS_CANNONLAKE(dev_priv) && in hsw_power_well_enable()
2866 } else if (IS_CANNONLAKE(dev_priv)) { in intel_power_domains_init()
3550 } else if (IS_CANNONLAKE(dev_priv)) { in intel_power_domains_init_hw()
3593 else if (IS_CANNONLAKE(dev_priv)) in intel_power_domains_suspend()
Di915_drv.h2369 #define IS_CANNONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_CANNONLAKE) macro
2422 #define IS_CNL_WITH_PORT_F(dev_priv) (IS_CANNONLAKE(dev_priv) && \
2467 (IS_CANNONLAKE(p) && IS_REVID(p, since, until))
2554 (IS_CANNONLAKE(dev_priv) || \
Di915_drv.c182 WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); in intel_pch_type()
186 WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); in intel_pch_type()
229 else if (IS_COFFEELAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) in intel_virt_detect_pch()
Dintel_color.c661 } else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) { in intel_color_init()
Di915_perf.c3003 } else if (IS_CANNONLAKE(dev_priv)) { in i915_perf_register()
Dintel_dpll_mgr.c3208 else if (IS_CANNONLAKE(dev_priv)) in intel_shared_dpll_init()
Dintel_display.c3012 if ((IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) && in skl_check_main_surface()
5224 IS_CANNONLAKE(dev_priv)) in needs_nv12_wa()
5684 psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) && in haswell_crtc_enable()
9456 else if (IS_CANNONLAKE(dev_priv)) in haswell_get_ddi_port_state()
15770 if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) in intel_early_display_was()
Dintel_pm.c3605 IS_CANNONLAKE(dev_priv)) in intel_has_sagv()
9233 else if (IS_CANNONLAKE(dev_priv)) in intel_init_clock_gating_hooks()
Dintel_dp.c3543 if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) { in intel_dp_set_signal_levels()