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Searched refs:IS_BROADWELL (Results 1 – 25 of 29) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Ddisplay.c225 if (IS_BROADWELL(dev_priv)) { in emulate_monitor_status_change()
245 if (IS_BROADWELL(dev_priv)) { in emulate_monitor_status_change()
265 if (IS_BROADWELL(dev_priv)) { in emulate_monitor_status_change()
282 if (IS_BROADWELL(dev_priv)) in emulate_monitor_status_change()
292 if (IS_BROADWELL(dev_priv)) in emulate_monitor_status_change()
Dscheduler.c142 if (IS_BROADWELL(gvt->dev_priv) && ring_id == RCS) in populate_shadow_context()
740 if (IS_BROADWELL(gvt->dev_priv) && rq->engine->id == RCS) in update_guest_context()
Dcmd_parser.c945 if (IS_BROADWELL(gvt->dev_priv) && in cmd_handler_lri()
970 if (IS_BROADWELL(s->vgpu->gvt->dev_priv)) in cmd_handler_lrr()
998 if (IS_BROADWELL(gvt->dev_priv)) in cmd_handler_lrm()
1337 if (IS_BROADWELL(dev_priv)) in decode_mi_display_flip()
Dinterrupt.c571 if (IS_BROADWELL(gvt->dev_priv)) { in gen8_init_irq()
Dhandlers.c52 if (IS_BROADWELL(gvt->dev_priv)) in intel_gvt_get_device_type()
897 } else if (IS_BROADWELL(vgpu->gvt->dev_priv) && in dp_aux_ch_ctl_mmio_write()
3310 if (IS_BROADWELL(dev_priv)) { in intel_gvt_setup_mmio_info()
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_gvt.c44 if (IS_BROADWELL(dev_priv)) in is_supported_device()
Dintel_fbc.c336 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in gen7_fbc_activate()
447 if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv)) in find_compression_threshold()
661 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_fbc_update_state_cache()
752 if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && in intel_fbc_can_activate()
1270 if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) in intel_sanitize_fbc_option()
Di915_drv.c147 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
152 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
157 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
163 WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
225 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_virt_detect_pch()
1642 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i915_drm_suspend_late()
1839 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i915_drm_resume_early()
2614 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_runtime_suspend()
2648 if (IS_BROADWELL(dev_priv)) { in intel_runtime_suspend()
2702 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_runtime_resume()
Dintel_pipe_crc.c410 IS_BROADWELL(dev_priv)) && pipe == PIPE_A) in ivb_pipe_crc_ctl_reg()
506 IS_BROADWELL(dev_priv)) && crtc->index == PIPE_A) in intel_crtc_set_crc_source()
Dintel_workarounds.c522 else if (IS_BROADWELL(dev_priv)) in intel_ctx_workarounds_init()
914 else if (IS_BROADWELL(dev_priv)) in intel_gt_workarounds_apply()
1026 else if (IS_BROADWELL(i915)) in whitelist_build()
Dintel_cdclk.c2152 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pixel_rate_to_cdclk()
2172 if (IS_BROADWELL(dev_priv) && hsw_crtc_state_ips_capable(crtc_state)) in intel_crtc_compute_min_cdclk()
2187 } else if (IS_GEN9(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_crtc_compute_min_cdclk()
2555 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_compute_max_dotclk()
2608 } else if (IS_BROADWELL(dev_priv)) { in intel_update_max_cdclk()
2788 } else if (IS_BROADWELL(dev_priv)) { in intel_init_cdclk_hooks()
2817 else if (IS_BROADWELL(dev_priv)) in intel_init_cdclk_hooks()
Dintel_hdcp.c51 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in hdcp_key_loadable()
97 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_hdcp_load_keys()
Dintel_i2c.c100 else if (IS_BROADWELL(dev_priv)) in get_gmbus_pin()
119 else if (IS_BROADWELL(dev_priv)) in intel_gmbus_is_valid_pin()
Di915_drv.h2363 #define IS_BROADWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROADWELL) macro
2374 #define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
2379 #define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
2381 #define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \
2524 IS_BROADWELL(dev_priv)) && HAS_EDRAM(dev_priv))
2575 #define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
Dintel_psr.c555 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_enable_source()
967 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_init()
Dintel_ddi.c715 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_dp()
736 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_edp()
751 if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_fdi()
769 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_hdmi()
934 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_hdmi_level()
Dintel_pm.c2877 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_read_wm_latency()
2927 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_max_level()
3101 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_compute_pipe_wm()
3292 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_lp_latency()
3516 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_write_wm_values()
5562 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_pipe_wm_get_hw_state()
6030 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_get_hw_state()
6435 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in gen6_set_rps()
6782 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv) || in gen6_init_rps_frequencies()
8182 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_init_gt_powersave()
[all …]
Dintel_color.c657 } else if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv) || in intel_color_init()
Dintel_sprite.c649 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ivb_sprite_ctl()
742 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ivb_update_plane()
Dintel_device_info.c845 else if (IS_BROADWELL(dev_priv)) in intel_device_info_runtime_init()
Dintel_display.c3227 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i9xx_plane_ctl()
3290 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()
3353 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_update_plane()
5045 if (IS_BROADWELL(dev_priv)) { in hsw_enable_ips()
5078 if (IS_BROADWELL(dev_priv)) { in hsw_disable_ips()
6386 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ironlake_check_fdi_lanes()
6510 if (IS_BROADWELL(dev_priv) && in hsw_crtc_state_ips_capable()
6535 if (IS_BROADWELL(dev_priv) && in hsw_compute_ips_config()
7759 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_get_initial_plane_config()
8436 if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) { in haswell_set_pipemisc()
[all …]
Dintel_uncore.c451 IS_BROADWELL(dev_priv) || in intel_uncore_edram_detect()
1449 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_uncore_fw_domains_init()
Di915_irq.c2804 } else if (IS_BROADWELL(dev_priv)) { in gen8_de_irq_handler()
4187 else if (IS_BROADWELL(dev_priv)) in gen8_de_irq_postinstall()
4215 } else if (IS_BROADWELL(dev_priv)) { in gen8_de_irq_postinstall()
Di915_debugfs.c1142 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i915_frequency_info()
2728 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i915_edp_psr_status()
4471 } else if (IS_BROADWELL(dev_priv)) { in i915_sseu_status()
Dintel_dp.c313 IS_BROADWELL(dev_priv)) { in intel_dp_set_source_rates()
1028 if (IS_BROADWELL(dev_priv)) in g4x_get_aux_send_ctl()
1516 else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_dp_aux_init()

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