/Linux-v4.19/drivers/pinctrl/sh-pfc/ |
D | pfc-r8a77970.c | 119 #define GPSR3_7 F_(VI1_DATA3, IP5_31_28) 202 #define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_D1) F_(0, 0) F_(0, 0) F… macro 277 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 591 PINMUX_IPSR_GPSR(IP5_31_28, VI1_DATA3), 592 PINMUX_IPSR_MSEL(IP5_31_28, CANFD0_RX_B, SEL_CANFD0_1), 593 PINMUX_IPSR_GPSR(IP5_31_28, D6), 594 PINMUX_IPSR_GPSR(IP5_31_28, MMC_D1), 2312 IP5_31_28
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D | pfc-r8a77980.c | 130 #define GPSR3_7 F_(VI1_DATA3, IP5_31_28) 232 #define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_CMD) F_(0, 0) F_(0, 0) … macro 325 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 666 PINMUX_IPSR_GPSR(IP5_31_28, VI1_DATA3), 667 PINMUX_IPSR_MSEL(IP5_31_28, CANFD0_RX_B, SEL_CANFD0_1), 668 PINMUX_IPSR_GPSR(IP5_31_28, D6), 669 PINMUX_IPSR_GPSR(IP5_31_28, MMC_CMD), 2689 IP5_31_28
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D | pfc-r8a77990.c | 51 #define GPSR0_2 F_(D2, IP5_31_28) 231 #define IP5_31_28 FM(D2) FM(MSIOF3_RXD_A) FM(RX5_C) F_(0, 0) FM(VI5_DATA14_A) FM(DU_DR3) FM(RX4… macro 370 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 810 PINMUX_IPSR_GPSR(IP5_31_28, D2), 811 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF3_RXD_A, SEL_MSIOF3_0), 812 PINMUX_IPSR_MSEL(IP5_31_28, RX5_C, SEL_SCIF5_2), 813 PINMUX_IPSR_MSEL(IP5_31_28, VI5_DATA14_A, SEL_VIN5_0), 814 PINMUX_IPSR_GPSR(IP5_31_28, DU_DR3), 815 PINMUX_IPSR_MSEL(IP5_31_28, RX4_C, SEL_SCIF4_2), 816 PINMUX_IPSR_GPSR(IP5_31_28, LCDOUT19), [all …]
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D | pfc-r8a77995.c | 103 #define GPSR2_10 F_(VI4_DATA9, IP5_31_28) 250 #define IP5_31_28 FM(VI4_DATA9) FM(MSIOF3_SS2_A) FM(IRQ1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) … macro 367 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 703 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA9), 704 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF3_SS2_A, SEL_MSIOF3_0), 705 PINMUX_IPSR_MSEL(IP5_31_28, IRQ1_B, SEL_IRQ_1_1), 2312 IP5_31_28
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D | pfc-r8a77965.c | 54 #define GPSR0_4 F_(D4, IP5_31_28) 265 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, … macro 423 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 903 PINMUX_IPSR_GPSR(IP5_31_28, D4), 904 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1), 905 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20), 906 PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4), 4349 IP5_31_28
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D | pfc-r8a7795-es1.c | 50 #define GPSR0_4 F_(D4, IP5_31_28) 260 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, … macro 409 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 894 PINMUX_IPSR_GPSR(IP5_31_28, D4), 895 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1), 896 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20), 897 PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4), 5026 IP5_31_28
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D | pfc-r8a7796.c | 56 #define GPSR0_4 F_(D4, IP5_31_28) 267 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, … macro 425 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 903 PINMUX_IPSR_GPSR(IP5_31_28, D4), 904 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1), 905 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20), 906 PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4), 5350 IP5_31_28
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D | pfc-r8a7795.c | 51 #define GPSR0_4 F_(D4, IP5_31_28) 262 #define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, … macro 420 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ 902 PINMUX_IPSR_GPSR(IP5_31_28, D4), 903 PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1), 904 PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20), 905 PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4), 5407 IP5_31_28
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D | pfc-r8a77470.c | 690 PINMUX_IPSR_GPSR(IP5_31_28, DU0_DG6), 691 PINMUX_IPSR_MSEL(IP5_31_28, HRX1_C, SEL_HSCIF1_2), 692 PINMUX_IPSR_GPSR(IP5_31_28, A14),
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