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Searched refs:IP3_7_4 (Results 1 – 10 of 10) sorted by relevance

/Linux-v4.19/drivers/pinctrl/sh-pfc/
Dpfc-r8a77970.c105 #define GPSR2_2 F_(VI0_HSYNC_N, IP3_7_4)
180 #define IP3_7_4 FM(VI0_HSYNC_N) FM(MSIOF2_TXD) FM(TX3) F_(0, 0) FM(HRTS3_N) F_(0, 0) F_(0, 0)… macro
262 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
490 PINMUX_IPSR_GPSR(IP3_7_4, VI0_HSYNC_N),
491 PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
492 PINMUX_IPSR_GPSR(IP3_7_4, TX3),
493 PINMUX_IPSR_GPSR(IP3_7_4, HRTS3_N),
2298 IP3_7_4
Dpfc-r8a77990.c76 #define GPSR1_2 F_(A2, IP3_7_4)
207 #define IP3_7_4 FM(A2) FM(IRQ2) FM(AVB_AVTP_PPS) FM(VI4_CLKENB) FM(VI5_DATA1_A) FM(DU_DISP) F… macro
355 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
638 PINMUX_IPSR_GPSR(IP3_7_4, A2),
639 PINMUX_IPSR_GPSR(IP3_7_4, IRQ2),
640 PINMUX_IPSR_GPSR(IP3_7_4, AVB_AVTP_PPS),
641 PINMUX_IPSR_GPSR(IP3_7_4, VI4_CLKENB),
642 PINMUX_IPSR_MSEL(IP3_7_4, VI5_DATA1_A, SEL_VIN5_0),
643 PINMUX_IPSR_GPSR(IP3_7_4, DU_DISP),
644 PINMUX_IPSR_MSEL(IP3_7_4, SCL6_B, SEL_I2C6_1),
[all …]
Dpfc-r8a77980.c116 #define GPSR2_2 F_(VI0_HSYNC_N, IP3_7_4)
210 #define IP3_7_4 FM(VI0_HSYNC_N) FM(MSIOF2_TXD) FM(TX3) F_(0, 0) FM(HRTS3_N) F_(0, 0) F_(0, 0)… macro
310 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
571 PINMUX_IPSR_GPSR(IP3_7_4, VI0_HSYNC_N),
572 PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
573 PINMUX_IPSR_GPSR(IP3_7_4, TX3),
574 PINMUX_IPSR_GPSR(IP3_7_4, HRTS3_N),
2675 IP3_7_4
Dpfc-r8a77995.c61 #define GPSR1_18 F_(DU_DR2, IP3_7_4)
226 #define IP3_7_4 FM(DU_DR2) FM(LCDOUT18) FM(PWM0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
352 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
624 PINMUX_IPSR_GPSR(IP3_7_4, DU_DR2),
625 PINMUX_IPSR_GPSR(IP3_7_4, LCDOUT18),
626 PINMUX_IPSR_MSEL(IP3_7_4, PWM0_B, SEL_PWM0_2),
2298 IP3_7_4
Dpfc-r8a77470.c611 PINMUX_IPSR_GPSR(IP3_7_4, D15),
612 PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_SS2),
613 PINMUX_IPSR_GPSR(IP3_7_4, PWM4_A),
614 PINMUX_IPSR_MSEL(IP3_7_4, CAN1_TX_B, SEL_CAN1_1),
615 PINMUX_IPSR_GPSR(IP3_7_4, IRQ2),
616 PINMUX_IPSR_MSEL(IP3_7_4, AVB_AVTP_MATCH_A, SEL_AVB_0),
Dpfc-r8a77965.c79 #define GPSR1_10 F_(A10, IP3_7_4)
241 #define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, … macro
408 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
764 PINMUX_IPSR_GPSR(IP3_7_4, A10),
765 PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
766 PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
767 PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
4335 IP3_7_4
Dpfc-r8a7795-es1.c74 #define GPSR1_10 F_(A10, IP3_7_4)
238 #define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_TANS_B) F_(0, 0) FM(VI5_HSYNC_N) F_… macro
394 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
755 PINMUX_IPSR_GPSR(IP3_7_4, A10),
756 PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
757 PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_TANS_B, SEL_SCIF4_1),
758 PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
5012 IP3_7_4
Dpfc-r8a7796.c81 #define GPSR1_10 F_(A10, IP3_7_4)
243 #define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, … macro
410 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
764 PINMUX_IPSR_GPSR(IP3_7_4, A10),
765 PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
766 PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
767 PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
5336 IP3_7_4
Dpfc-r8a7795.c76 #define GPSR1_10 F_(A10, IP3_7_4)
240 #define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, … macro
405 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
763 PINMUX_IPSR_GPSR(IP3_7_4, A10),
764 PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
765 PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
766 PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
5393 IP3_7_4
Dpfc-r8a7790.c958 PINMUX_IPSR_GPSR(IP3_7_4, A12),
959 PINMUX_IPSR_MSEL(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1),
960 PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
961 PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1, SEL_VI1_0),
962 PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1_B, SEL_VI1_1),
963 PINMUX_IPSR_GPSR(IP3_7_4, VI2_G1),
964 PINMUX_IPSR_MSEL(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1),