| /Linux-v4.19/drivers/pinctrl/sh-pfc/ |
| D | pfc-r8a77970.c | 106 #define GPSR2_1 F_(VI0_CLKENB, IP3_3_0)
179 #define IP3_3_0 FM(VI0_CLKENB) FM(MSIOF2_RXD) FM(RX3) FM(RD_WR_N) FM(HCTS3_N) F_(0, 0) F_(0, … macro
261 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
484 PINMUX_IPSR_GPSR(IP3_3_0, VI0_CLKENB),
485 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_RXD),
486 PINMUX_IPSR_GPSR(IP3_3_0, RX3),
487 PINMUX_IPSR_GPSR(IP3_3_0, RD_WR_N),
488 PINMUX_IPSR_GPSR(IP3_3_0, HCTS3_N),
2299 IP3_3_0 }
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| D | pfc-r8a77990.c | 77 #define GPSR1_1 F_(A1, IP3_3_0)
206 #define IP3_3_0 FM(A1) FM(IRQ1) FM(PWM3_A) FM(DU_DOTCLKIN1) FM(VI5_DATA0_A) FM(DU_DISP_CDE) F… macro
354 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
628 PINMUX_IPSR_GPSR(IP3_3_0, A1),
629 PINMUX_IPSR_GPSR(IP3_3_0, IRQ1),
630 PINMUX_IPSR_MSEL(IP3_3_0, PWM3_A, SEL_PWM3_0),
631 PINMUX_IPSR_GPSR(IP3_3_0, DU_DOTCLKIN1),
632 PINMUX_IPSR_MSEL(IP3_3_0, VI5_DATA0_A, SEL_VIN5_0),
633 PINMUX_IPSR_GPSR(IP3_3_0, DU_DISP_CDE),
634 PINMUX_IPSR_MSEL(IP3_3_0, SDA6_B, SEL_I2C6_1),
[all …]
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| D | pfc-r8a77980.c | 117 #define GPSR2_1 F_(VI0_CLKENB, IP3_3_0)
209 #define IP3_3_0 FM(VI0_CLKENB) FM(MSIOF2_RXD) FM(RX3) FM(RD_WR_N) FM(HCTS3_N) F_(0, 0) F_(0, … macro
309 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
565 PINMUX_IPSR_GPSR(IP3_3_0, VI0_CLKENB),
566 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_RXD),
567 PINMUX_IPSR_GPSR(IP3_3_0, RX3),
568 PINMUX_IPSR_GPSR(IP3_3_0, RD_WR_N),
569 PINMUX_IPSR_GPSR(IP3_3_0, HCTS3_N),
2676 IP3_3_0 }
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| D | pfc-r8a77995.c | 62 #define GPSR1_17 F_(DU_DR1, IP3_3_0)
225 #define IP3_3_0 FM(DU_DR1) FM(LCDOUT17) FM(TX4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)… macro
351 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
620 PINMUX_IPSR_GPSR(IP3_3_0, DU_DR1),
621 PINMUX_IPSR_GPSR(IP3_3_0, LCDOUT17),
622 PINMUX_IPSR_MSEL(IP3_3_0, TX4_B, SEL_SCIF4_1),
2299 IP3_3_0 }
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| D | pfc-r8a77470.c | 606 PINMUX_IPSR_GPSR(IP3_3_0, D14),
607 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_SS1),
608 PINMUX_IPSR_MSEL(IP3_3_0, TX4_C, SEL_SCIF4_2),
609 PINMUX_IPSR_MSEL(IP3_3_0, CAN1_RX_B, SEL_CAN1_1),
610 PINMUX_IPSR_MSEL(IP3_3_0, AVB_AVTP_CAPTURE_A, SEL_AVB_0),
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| D | pfc-r8a77965.c | 80 #define GPSR1_9 F_(A9, IP3_3_0)
240 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
407 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
759 PINMUX_IPSR_GPSR(IP3_3_0, A9),
760 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
761 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
762 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
4336 IP3_3_0 }
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| D | pfc-r8a7795-es1.c | 75 #define GPSR1_9 F_(A9, IP3_3_0)
237 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
393 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
750 PINMUX_IPSR_GPSR(IP3_3_0, A9),
751 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
752 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
753 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
5013 IP3_3_0 }
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| D | pfc-r8a7796.c | 82 #define GPSR1_9 F_(A9, IP3_3_0)
242 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
409 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
759 PINMUX_IPSR_GPSR(IP3_3_0, A9),
760 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
761 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
762 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
5337 IP3_3_0 }
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| D | pfc-r8a7795.c | 77 #define GPSR1_9 F_(A9, IP3_3_0)
239 #define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0… macro
404 FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
758 PINMUX_IPSR_GPSR(IP3_3_0, A9),
759 PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0),
760 PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1),
761 PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N),
5394 IP3_3_0 }
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| D | pfc-r8a7790.c | 951 PINMUX_IPSR_GPSR(IP3_3_0, A11),
952 PINMUX_IPSR_MSEL(IP3_3_0, SCIFB2_CTS_N_B, SEL_SCIFB2_1),
953 PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_SCK),
954 PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0, SEL_VI1_0),
955 PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0_B, SEL_VI1_1),
956 PINMUX_IPSR_GPSR(IP3_3_0, VI2_G0),
957 PINMUX_IPSR_MSEL(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1),
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