| /Linux-v4.19/drivers/pinctrl/sh-pfc/ |
| D | pfc-r8a77970.c | 104 #define GPSR2_3 F_(VI0_VSYNC_N, IP3_11_8)
181 #define IP3_11_8 FM(VI0_VSYNC_N) FM(MSIOF2_SYNC) FM(CTS3_N) F_(0, 0) FM(HTX3) F_(0, 0) F_(0, 0)… macro
263 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
495 PINMUX_IPSR_GPSR(IP3_11_8, VI0_VSYNC_N),
496 PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_SYNC),
497 PINMUX_IPSR_GPSR(IP3_11_8, CTS3_N),
498 PINMUX_IPSR_GPSR(IP3_11_8, HTX3),
2297 IP3_11_8
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| D | pfc-r8a77990.c | 75 #define GPSR1_3 F_(A3, IP3_11_8)
208 #define IP3_11_8 FM(A3) FM(CTS4_N_A) FM(PWM4_A) FM(VI4_DATA12) F_(0, 0) FM(DU_DOTCLKOUT0) FM(… macro
356 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
647 PINMUX_IPSR_GPSR(IP3_11_8, A3),
648 PINMUX_IPSR_MSEL(IP3_11_8, CTS4_N_A, SEL_SCIF4_0),
649 PINMUX_IPSR_MSEL(IP3_11_8, PWM4_A, SEL_PWM4_0),
650 PINMUX_IPSR_GPSR(IP3_11_8, VI4_DATA12),
651 PINMUX_IPSR_GPSR(IP3_11_8, DU_DOTCLKOUT0),
652 PINMUX_IPSR_GPSR(IP3_11_8, HTX3_D),
653 PINMUX_IPSR_GPSR(IP3_11_8, IECLK),
[all …]
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| D | pfc-r8a77980.c | 115 #define GPSR2_3 F_(VI0_VSYNC_N, IP3_11_8)
211 #define IP3_11_8 FM(VI0_VSYNC_N) FM(MSIOF2_SYNC) FM(CTS3_N) F_(0, 0) FM(HTX3) F_(0, 0) F_(0, 0)… macro
311 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
576 PINMUX_IPSR_GPSR(IP3_11_8, VI0_VSYNC_N),
577 PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_SYNC),
578 PINMUX_IPSR_GPSR(IP3_11_8, CTS3_N),
579 PINMUX_IPSR_GPSR(IP3_11_8, HTX3),
2674 IP3_11_8
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| D | pfc-r8a77995.c | 60 #define GPSR1_19 F_(DU_DR3, IP3_11_8)
227 #define IP3_11_8 FM(DU_DR3) FM(LCDOUT19) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
353 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
628 PINMUX_IPSR_GPSR(IP3_11_8, DU_DR3),
629 PINMUX_IPSR_GPSR(IP3_11_8, LCDOUT19),
630 PINMUX_IPSR_MSEL(IP3_11_8, PWM1_B, SEL_PWM1_2),
2297 IP3_11_8
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| D | pfc-r8a77965.c | 78 #define GPSR1_11 F_(A11, IP3_11_8)
242 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro
409 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
769 PINMUX_IPSR_GPSR(IP3_11_8, A11),
770 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1),
771 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0),
772 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1),
773 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4),
774 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD),
775 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0),
[all …]
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| D | pfc-r8a7795-es1.c | 73 #define GPSR1_11 F_(A11, IP3_11_8)
239 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro
395 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
760 PINMUX_IPSR_GPSR(IP3_11_8, A11),
761 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1),
762 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0),
763 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1),
764 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4),
765 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD),
766 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0),
[all …]
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| D | pfc-r8a7796.c | 80 #define GPSR1_11 F_(A11, IP3_11_8)
244 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro
411 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
769 PINMUX_IPSR_GPSR(IP3_11_8, A11),
770 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1),
771 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0),
772 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1),
773 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4),
774 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD),
775 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0),
[all …]
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| D | pfc-r8a7795.c | 75 #define GPSR1_11 F_(A11, IP3_11_8)
241 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… macro
406 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
768 PINMUX_IPSR_GPSR(IP3_11_8, A11),
769 PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1),
770 PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0),
771 PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1),
772 PINMUX_IPSR_GPSR(IP3_11_8, HSCK4),
773 PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD),
774 PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0),
[all …]
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| D | pfc-r8a7790.c | 965 PINMUX_IPSR_GPSR(IP3_11_8, A13),
966 PINMUX_IPSR_MSEL(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1),
967 PINMUX_IPSR_GPSR(IP3_11_8, EX_WAIT2),
968 PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_RXD),
969 PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2, SEL_VI1_0),
970 PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2_B, SEL_VI1_1),
971 PINMUX_IPSR_GPSR(IP3_11_8, VI2_G2),
972 PINMUX_IPSR_MSEL(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1),
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| D | pfc-r8a77470.c | 617 PINMUX_IPSR_GPSR(IP3_11_8, QSPI0_SPCLK),
618 PINMUX_IPSR_GPSR(IP3_11_8, WE0_N),
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