IP2_31_28 (reference) in projects: Linux-v4.19

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Searched refs:IP2_31_28 (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/pinctrl/sh-pfc/
D	pfc-r8a77990.c	78 #define GPSR1_0 F_(A0, IP2_31_28) 205 #define IP2_31_28 FM(A0) FM(IRQ0) FM(PWM2_A) FM(MSIOF3_SS1_B) FM(VI5_CLK_A) FM(DU_CDE) FM(HRX3… macro 361 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 617 PINMUX_IPSR_GPSR(IP2_31_28, A0), 618 PINMUX_IPSR_GPSR(IP2_31_28, IRQ0), 619 PINMUX_IPSR_MSEL(IP2_31_28, PWM2_A, SEL_PWM2_0), 620 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF3_SS1_B, SEL_MSIOF3_1), 621 PINMUX_IPSR_MSEL(IP2_31_28, VI5_CLK_A, SEL_VIN5_0), 622 PINMUX_IPSR_GPSR(IP2_31_28, DU_CDE), 623 PINMUX_IPSR_MSEL(IP2_31_28, HRX3_D, SEL_HSCIF3_3), [all …]
D	pfc-r8a77970.c	`107 #define GPSR2_0 F_(VI0_CLK, IP2_31_28) 178 #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0… macro 268 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 478 PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK), 479 PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK), 480 PINMUX_IPSR_GPSR(IP2_31_28, SCK3), 481 PINMUX_IPSR_GPSR(IP2_31_28, HSCK3), 2282 IP2_31_28`
D	pfc-r8a77980.c	`118 #define GPSR2_0 F_(VI0_CLK, IP2_31_28) 208 #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0… macro 316 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 559 PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK), 560 PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK), 561 PINMUX_IPSR_GPSR(IP2_31_28, SCK3), 562 PINMUX_IPSR_GPSR(IP2_31_28, HSCK3), 2659 IP2_31_28`
D	pfc-r8a77995.c	`63 #define GPSR1_16 F_(DU_DR0, IP2_31_28) 224 #define IP2_31_28 FM(DU_DR0) FM(LCDOUT16) FM(RX4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro 358 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 615 PINMUX_IPSR_GPSR(IP2_31_28, DU_DR0), 616 PINMUX_IPSR_GPSR(IP2_31_28, LCDOUT16), 617 PINMUX_IPSR_MSEL(IP2_31_28, RX4_B, SEL_SCIF4_1), 2282 IP2_31_28`
D	pfc-r8a77965.c	81 #define GPSR1_8 F_(A8, IP2_31_28) 239 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 414 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 750 PINMUX_IPSR_GPSR(IP2_31_28, A8), 751 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 752 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 753 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 754 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 755 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 756 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a7795-es1.c	76 #define GPSR1_8 F_(A8, IP2_31_28) 236 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 400 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 741 PINMUX_IPSR_GPSR(IP2_31_28, A8), 742 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 743 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 744 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 745 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 746 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 747 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a7796.c	83 #define GPSR1_8 F_(A8, IP2_31_28) 241 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 416 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 750 PINMUX_IPSR_GPSR(IP2_31_28, A8), 751 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 752 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 753 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 754 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 755 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 756 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a7795.c	78 #define GPSR1_8 F_(A8, IP2_31_28) 238 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 411 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 749 PINMUX_IPSR_GPSR(IP2_31_28, A8), 750 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 751 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 752 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 753 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 754 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 755 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a77470.c	`601 PINMUX_IPSR_GPSR(IP2_31_28, D13), 602 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 603 PINMUX_IPSR_MSEL(IP2_31_28, RX4_C, SEL_SCIF4_2),`