| /Linux-v4.19/drivers/pinctrl/sh-pfc/ |
| D | pfc-r8a77980.c | 37 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
204 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(MSIOF3_SS2) FM(GETHER_PHY_INT_B) FM(A19) FM(FXR_TXE… macro
312 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
543 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
544 PINMUX_IPSR_GPSR(IP2_15_12, MSIOF3_SS2),
545 PINMUX_IPSR_MSEL(IP2_15_12, GETHER_PHY_INT_B, SEL_GETHER_1),
546 PINMUX_IPSR_GPSR(IP2_15_12, A19),
547 PINMUX_IPSR_GPSR(IP2_15_12, FXR_TXENA_N),
2663 IP2_15_12
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| D | pfc-r8a77970.c | 39 #define GPSR0_19 F_(DU_EXHSYNC_DU_HSYNC, IP2_15_12)
174 #define IP2_15_12 FM(DU_EXHSYNC_DU_HSYNC) FM(HRX0) F_(0, 0) FM(A19) FM(IRQ3) F_(0, 0) F_(0, 0) … macro
264 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
464 PINMUX_IPSR_GPSR(IP2_15_12, DU_EXHSYNC_DU_HSYNC),
465 PINMUX_IPSR_GPSR(IP2_15_12, HRX0),
466 PINMUX_IPSR_GPSR(IP2_15_12, A19),
467 PINMUX_IPSR_GPSR(IP2_15_12, IRQ3),
2286 IP2_15_12
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| D | pfc-r8a77990.c | 84 #define GPSR2_22 F_(BS_N, IP2_15_12)
201 #define IP2_15_12 FM(BS_N) FM(PWM0_A) FM(AVB_MAGIC) FM(VI4_CLK) F_(0, 0) FM(TX3_C) F_(0, 0) FM… macro
357 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
587 PINMUX_IPSR_GPSR(IP2_15_12, BS_N),
588 PINMUX_IPSR_MSEL(IP2_15_12, PWM0_A, SEL_PWM0_0),
589 PINMUX_IPSR_GPSR(IP2_15_12, AVB_MAGIC),
590 PINMUX_IPSR_GPSR(IP2_15_12, VI4_CLK),
591 PINMUX_IPSR_GPSR(IP2_15_12, TX3_C),
592 PINMUX_IPSR_MSEL(IP2_15_12, VI5_CLK_B, SEL_VIN5_1),
2289 IP2_15_12
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| D | pfc-r8a77995.c | 67 #define GPSR1_12 F_(DU_DG4, IP2_15_12)
220 #define IP2_15_12 FM(DU_DG4) FM(LCDOUT12) FM(HSCK3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,… macro
354 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
599 PINMUX_IPSR_GPSR(IP2_15_12, DU_DG4),
600 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT12),
601 PINMUX_IPSR_MSEL(IP2_15_12, HSCK3_B, SEL_HSCIF3_1),
2286 IP2_15_12
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| D | pfc-r8a7779.c | 772 PINMUX_IPSR_MSEL(IP2_15_12, HRTS0, SEL_HSCIF0_0),
773 PINMUX_IPSR_MSEL(IP2_15_12, RTS1_TANS, SEL_SCIF1_0),
774 PINMUX_IPSR_GPSR(IP2_15_12, MDATA),
775 PINMUX_IPSR_GPSR(IP2_15_12, TX0_C),
776 PINMUX_IPSR_GPSR(IP2_15_12, SUB_TMS),
777 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE1),
778 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE9),
779 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE17),
780 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE25),
781 PINMUX_IPSR_GPSR(IP2_15_12, CC5_STATE33),
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| D | pfc-r8a77965.c | 85 #define GPSR1_4 F_(A4, IP2_15_12)
235 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
410 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
719 PINMUX_IPSR_GPSR(IP2_15_12, A4),
720 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
721 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
722 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
723 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
724 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
4323 IP2_15_12
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| D | pfc-r8a7795-es1.c | 80 #define GPSR1_4 F_(A4, IP2_15_12)
232 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
396 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
710 PINMUX_IPSR_GPSR(IP2_15_12, A4),
711 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
712 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
713 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
714 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
715 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5000 IP2_15_12
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| D | pfc-r8a7796.c | 87 #define GPSR1_4 F_(A4, IP2_15_12)
237 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
412 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
719 PINMUX_IPSR_GPSR(IP2_15_12, A4),
720 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
721 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
722 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
723 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
724 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5324 IP2_15_12
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| D | pfc-r8a7795.c | 82 #define GPSR1_4 F_(A4, IP2_15_12)
234 #define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) F… macro
407 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
718 PINMUX_IPSR_GPSR(IP2_15_12, A4),
719 PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20),
720 PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1),
721 PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12),
722 PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12),
723 PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4),
5381 IP2_15_12
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| D | pfc-r8a77470.c | 587 PINMUX_IPSR_GPSR(IP2_15_12, D9),
588 PINMUX_IPSR_GPSR(IP2_15_12, HRTS2_N),
589 PINMUX_IPSR_MSEL(IP2_15_12, TX1_C, SEL_SCIF1_2),
590 PINMUX_IPSR_MSEL(IP2_15_12, SDA1_D, SEL_I2C01_3),
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