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Searched refs:IP0_27_24 (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/pinctrl/sh-pfc/
Dpfc-r8a77970.c52 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
161 #define IP0_27_24 FM(DU_DG2) FM(MSIOF3_SS1) F_(0, 0) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
267 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
410 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
411 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF3_SS1),
412 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2263 IP0_27_24
Dpfc-r8a77995.c37 #define GPSR0_8 F_(MLB_SIG, IP0_27_24)
207 #define IP0_27_24 FM(MLB_SIG) FM(MSIOF2_SS2) FM(TX5_A) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_… macro
357 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
545 PINMUX_IPSR_GPSR(IP0_27_24, MLB_SIG),
546 PINMUX_IPSR_GPSR(IP0_27_24, MSIOF2_SS2),
547 PINMUX_IPSR_MSEL(IP0_27_24, TX5_A, SEL_SCIF5_0),
548 PINMUX_IPSR_MSEL(IP0_27_24, SDA3_B, SEL_I2C3_1),
2263 IP0_27_24
Dpfc-r8a77980.c50 #define GPSR0_6 F_(DU_DG2, IP0_27_24)
191 #define IP0_27_24 FM(DU_DG2) F_(0, 0) FM(GETHER_RMII_TXD1) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_… macro
315 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
480 PINMUX_IPSR_GPSR(IP0_27_24, DU_DG2),
481 PINMUX_IPSR_GPSR(IP0_27_24, GETHER_RMII_TXD1),
482 PINMUX_IPSR_GPSR(IP0_27_24, A6),
2640 IP0_27_24
Dpfc-r8a77990.c99 #define GPSR2_7 F_(QSPI1_MOSI_IO0, IP0_27_24)
188 #define IP0_27_24 FM(QSPI1_MOSI_IO0) FM(RIF2_SYNC_A) FM(HTX4_B) FM(VI4_DATA1_A) F_(0, 0) F_(0, … macro
360 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
538 PINMUX_IPSR_GPSR(IP0_27_24, QSPI1_MOSI_IO0),
539 PINMUX_IPSR_MSEL(IP0_27_24, RIF2_SYNC_A, SEL_DRIF2_0),
540 PINMUX_IPSR_GPSR(IP0_27_24, HTX4_B),
541 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA1_A, SEL_VIN4_0),
2266 IP0_27_24
Dpfc-r8a77965.c106 #define GPSR2_0 F_(IRQ0, IP0_27_24)
222 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
413 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
630 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
631 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
632 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
633 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
634 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
635 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
636 PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4),
[all …]
Dpfc-r8a7795-es1.c101 #define GPSR2_0 F_(IRQ0, IP0_27_24)
217 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
399 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
622 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
623 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
624 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
625 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
626 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
627 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
4977 IP0_27_24
Dpfc-r8a7796.c108 #define GPSR2_0 F_(IRQ0, IP0_27_24)
224 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
415 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
631 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
632 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
633 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
634 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
635 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
636 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
637 PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4),
[all …]
Dpfc-r8a7795.c103 #define GPSR2_0 F_(IRQ0, IP0_27_24)
219 #define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD… macro
410 FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
629 PINMUX_IPSR_GPSR(IP0_27_24, IRQ0),
630 PINMUX_IPSR_GPSR(IP0_27_24, QPOLB),
631 PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE),
632 PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1),
633 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1),
634 PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1),
635 PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4),
[all …]
Dpfc-r8a77470.c529 PINMUX_IPSR_GPSR(IP0_27_24, SD0_CD),
530 PINMUX_IPSR_MSEL(IP0_27_24, CAN0_RX_A, SEL_CAN0_0),