Searched refs:IMX7D_PLL_ENET_MAIN_50M_CLK (Results 1 – 3 of 3) sorted by relevance
57 #define IMX7D_PLL_ENET_MAIN_50M_CLK 44 macro
107 <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>;
496 …clks[IMX7D_PLL_ENET_MAIN_50M_CLK] = imx_clk_gate("pll_enet_50m_clk", "pll_enet_50m", base + 0xe0,… in imx7d_clocks_init()
