Searched refs:IMX7D_PLL_DRAM_MAIN_CLK (Results 1 – 2 of 2) sorted by relevance
61 #define IMX7D_PLL_DRAM_MAIN_CLK 48 macro
439 …clks[IMX7D_PLL_DRAM_MAIN_CLK] = imx_clk_gate("pll_dram_main_clk", "pll_dram_test_div", base + 0x70… in imx7d_clocks_init()
