Searched refs:IMX6UL_CLK_PLL2_BUS (Results 1 – 3 of 3) sorted by relevance
39 #define IMX6UL_CLK_PLL2_BUS 26 macro
176 clks[IMX6UL_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13); in imx6ul_clocks_init()486 clk_set_parent(clks[IMX6UL_CLK_PERIPH_PRE], clks[IMX6UL_CLK_PLL2_BUS]); in imx6ul_clocks_init()
81 <&clks IMX6UL_CLK_PLL2_BUS>,
