Searched refs:IMX6SX_CLK_PLL2_BUS (Results 1 – 2 of 2) sorted by relevance
18 #define IMX6SX_CLK_PLL2_BUS 5 macro
190 clks[IMX6SX_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13); in imx6sx_clocks_init()555 clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]); in imx6sx_clocks_init()556 clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]); in imx6sx_clocks_init()
