Searched refs:IMX6SLL_CLK_PLL4_AUDIO_DIV (Results 1 – 2 of 2) sorted by relevance
55 #define IMX6SLL_CLK_PLL4_AUDIO_DIV 44 macro
169 clks[IMX6SLL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", in imx6sll_clocks_init()
