Searched refs:IMX6SLL_CLK_PLL2_BUS (Results 1 – 2 of 2) sorted by relevance
36 #define IMX6SLL_CLK_PLL2_BUS 25 macro
132 clks[IMX6SLL_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13); in imx6sll_clocks_init()342 clk_set_parent(clks[IMX6SLL_CLK_PERIPH_PRE], clks[IMX6SLL_CLK_PLL2_BUS]); in imx6sll_clocks_init()
