Searched refs:IMX6QDL_CLK_PLL5_POST_DIV (Results 1 – 2 of 2) sorted by relevance
207 #define IMX6QDL_CLK_PLL5_POST_DIV 194 macro
543 …clk[IMX6QDL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", C… in imx6q_clocks_init()
