Searched refs:IMX6QDL_CLK_PLL1_SYS (Results 1 – 4 of 4) sorted by relevance
46 <&clks IMX6QDL_CLK_PLL1_SYS>;80 <&clks IMX6QDL_CLK_PLL1_SYS>;114 <&clks IMX6QDL_CLK_PLL1_SYS>;148 <&clks IMX6QDL_CLK_PLL1_SYS>;
41 <&clks IMX6QDL_CLK_PLL1_SYS>;71 <&clks IMX6QDL_CLK_PLL1_SYS>;
183 #define IMX6QDL_CLK_PLL1_SYS 170 macro
470 clk[IMX6QDL_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", base + 0x00, 13); in imx6q_clocks_init()
