Searched refs:IMX6QDL_CLK_PERIPH2_CLK2_SEL (Results 1 – 2 of 2) sorted by relevance
33 #define IMX6QDL_CLK_PERIPH2_CLK2_SEL 21 macro
256 clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL], in mmdc_ch1_disable()556 …clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph2_cl… in imx6q_clocks_init()
