Searched refs:IMX6QDL_CLK_IPU2_DI1_PRE_SEL (Results 1 – 2 of 2) sorted by relevance
50 #define IMX6QDL_CLK_IPU2_DI1_PRE_SEL 38 macro
605 …clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL] = imx_clk_mux_flags("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_… in imx6q_clocks_init()861 clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); in imx6q_clocks_init()
