Searched refs:IMX5_CLK_SPDIF0_GATE (Results 1 – 2 of 2) sorted by relevance
195 #define IMX5_CLK_SPDIF0_GATE 183 macro
306 clk[IMX5_CLK_SPDIF0_GATE] = imx_clk_gate2("spdif0_gate", "spdif0_com_sel", MXC_CCM_CCGR5, 26); in mx5_clocks_common_init()
