Searched refs:IMX21_CLK_FCLK (Results 1 – 2 of 2) sorted by relevance
30 #define IMX21_CLK_FCLK 17 macro
67 clk[IMX21_CLK_FCLK] = imx_clk_divider("fclk", "mpll_gate", CCM_CSCR, 29, 3); in _mx21_clocks_init()
