Searched refs:IMX1_CLK_PER1 (Results 1 – 4 of 4) sorted by relevance
85 <&clks IMX1_CLK_PER1>;94 <&clks IMX1_CLK_PER1>;114 <&clks IMX1_CLK_PER1>;124 <&clks IMX1_CLK_PER1>;135 <&clks IMX1_CLK_PER1>;154 <&clks IMX1_CLK_PER1>;174 <&clks IMX1_CLK_PER1>;196 <&clks IMX1_CLK_PER1>;
27 #define IMX1_CLK_PER1 14 macro
24 clocks = <&clks IMX1_CLK_DUMMY>, <&clks IMX1_CLK_PER1>;
67 clk[IMX1_CLK_PER1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4); in mx1_clocks_init_dt()
