/Linux-v4.19/drivers/gpu/drm/i915/ |
D | intel_sprite.c | 265 I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id), in skl_update_plane() 269 I915_WRITE_FW(PLANE_KEYVAL(pipe, plane_id), key->min_value); in skl_update_plane() 270 I915_WRITE_FW(PLANE_KEYMAX(pipe, plane_id), key->max_value); in skl_update_plane() 271 I915_WRITE_FW(PLANE_KEYMSK(pipe, plane_id), key->channel_mask); in skl_update_plane() 274 I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (y << 16) | x); in skl_update_plane() 275 I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride); in skl_update_plane() 276 I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); in skl_update_plane() 277 I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id), in skl_update_plane() 279 I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id), in skl_update_plane() 307 I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), in skl_update_plane() [all …]
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D | intel_i2c.c | 323 I915_WRITE_FW(GMBUS4, irq_en); in gmbus_wait() 330 I915_WRITE_FW(GMBUS4, 0); in gmbus_wait() 352 I915_WRITE_FW(GMBUS4, irq_enable); in gmbus_wait_idle() 358 I915_WRITE_FW(GMBUS4, 0); in gmbus_wait_idle() 390 I915_WRITE_FW(GMBUS0, gmbus0_reg | GMBUS_BYTE_CNT_OVERRIDE); in gmbus_xfer_read_chunk() 393 I915_WRITE_FW(GMBUS1, in gmbus_xfer_read_chunk() 418 I915_WRITE_FW(GMBUS0, gmbus0_reg); in gmbus_xfer_read_chunk() 475 I915_WRITE_FW(GMBUS3, val); in gmbus_xfer_write_chunk() 476 I915_WRITE_FW(GMBUS1, in gmbus_xfer_write_chunk() 489 I915_WRITE_FW(GMBUS3, val); in gmbus_xfer_write_chunk() [all …]
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D | intel_uncore.c | 1715 I915_WRITE_FW(RING_HEAD(base), I915_READ_FW(RING_TAIL(base))); in gen3_stop_engine() 1718 I915_WRITE_FW(RING_HEAD(base), 0); in gen3_stop_engine() 1719 I915_WRITE_FW(RING_TAIL(base), 0); in gen3_stop_engine() 1723 I915_WRITE_FW(RING_CTL(base), 0); in gen3_stop_engine() 2074 I915_WRITE_FW(RING_RESET_CTL(engine->mmio_base), in gen8_reset_engine_start() 2093 I915_WRITE_FW(RING_RESET_CTL(engine->mmio_base), in gen8_reset_engine_cancel()
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D | intel_workarounds.c | 1063 I915_WRITE_FW(RING_FORCE_TO_NONPRIV(base, i), in whitelist_apply() 1068 I915_WRITE_FW(RING_FORCE_TO_NONPRIV(base, i), w->nopid); in whitelist_apply()
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D | intel_display.c | 3338 I915_WRITE_FW(DSPSIZE(i9xx_plane), in i9xx_update_plane() 3341 I915_WRITE_FW(DSPPOS(i9xx_plane), 0); in i9xx_update_plane() 3343 I915_WRITE_FW(PRIMSIZE(i9xx_plane), in i9xx_update_plane() 3346 I915_WRITE_FW(PRIMPOS(i9xx_plane), 0); in i9xx_update_plane() 3347 I915_WRITE_FW(PRIMCNSTALPHA(i9xx_plane), 0); in i9xx_update_plane() 3350 I915_WRITE_FW(reg, dspcntr); in i9xx_update_plane() 3352 I915_WRITE_FW(DSPSTRIDE(i9xx_plane), fb->pitches[0]); in i9xx_update_plane() 3354 I915_WRITE_FW(DSPSURF(i9xx_plane), in i9xx_update_plane() 3357 I915_WRITE_FW(DSPOFFSET(i9xx_plane), (y << 16) | x); in i9xx_update_plane() 3359 I915_WRITE_FW(DSPSURF(i9xx_plane), in i9xx_update_plane() [all …]
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D | intel_csr.c | 259 I915_WRITE_FW(CSR_PROGRAM(i), payload[i]); in intel_csr_load_program()
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D | intel_engine_cs.c | 786 I915_WRITE_FW(mode, _MASKED_BIT_ENABLE(STOP_RING)); in intel_engine_stop_cs() 874 I915_WRITE_FW(GEN8_MCR_SELECTOR, mcr); in read_subslice_reg() 881 I915_WRITE_FW(GEN8_MCR_SELECTOR, mcr); in read_subslice_reg()
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D | intel_pm.c | 1986 I915_WRITE_FW(DSPARB, dsparb); in vlv_atomic_update_fifo() 1987 I915_WRITE_FW(DSPARB2, dsparb2); in vlv_atomic_update_fifo() 2003 I915_WRITE_FW(DSPARB, dsparb); in vlv_atomic_update_fifo() 2004 I915_WRITE_FW(DSPARB2, dsparb2); in vlv_atomic_update_fifo() 2020 I915_WRITE_FW(DSPARB3, dsparb3); in vlv_atomic_update_fifo() 2021 I915_WRITE_FW(DSPARB2, dsparb2); in vlv_atomic_update_fifo() 9420 I915_WRITE_FW(GEN6_PCODE_DATA, *val); in sandybridge_pcode_read() 9421 I915_WRITE_FW(GEN6_PCODE_DATA1, 0); in sandybridge_pcode_read() 9422 I915_WRITE_FW(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | mbox); in sandybridge_pcode_read() 9433 I915_WRITE_FW(GEN6_PCODE_DATA, 0); in sandybridge_pcode_read() [all …]
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D | intel_ringbuffer.c | 1923 I915_WRITE_FW(GEN6_BSD_SLEEP_PSMI_CONTROL, in gen6_bsd_submit_request() 1943 I915_WRITE_FW(GEN6_BSD_SLEEP_PSMI_CONTROL, in gen6_bsd_submit_request()
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D | i915_irq.c | 2907 I915_WRITE_FW(GEN8_MASTER_IRQ, 0); in gen8_irq_handler() 2919 I915_WRITE_FW(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_irq_handler()
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D | i915_drv.h | 3630 #define I915_WRITE_FW(reg__, val__) __raw_i915_write32(dev_priv, (reg__), (val__)) macro
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/Linux-v4.19/drivers/gpu/drm/i915/gvt/ |
D | mmio_context.c | 373 I915_WRITE_FW(reg, 0x1); in handle_tlb_pending_event() 423 I915_WRITE_FW(offset, new_v); in switch_mocs() 441 I915_WRITE_FW(l3_offset, new_v); in switch_mocs() 525 I915_WRITE_FW(mmio->reg, new_v); in switch_mmio()
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