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Searched refs:I915_WRITE16 (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Di915_irq.c156 I915_WRITE16(type##IMR, 0xffff); \
158 I915_WRITE16(type##IER, 0); \
159 I915_WRITE16(type##IIR, 0xffff); \
161 I915_WRITE16(type##IIR, 0xffff); \
194 I915_WRITE16(reg, 0xffff); in gen2_assert_iir_is_zero()
196 I915_WRITE16(reg, 0xffff); in gen2_assert_iir_is_zero()
216 I915_WRITE16(type##IER, (ier_val)); \
217 I915_WRITE16(type##IMR, (imr_val)); \
1124 I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS)); in ironlake_rps_change_irq_handler()
1128 I915_WRITE16(MEMINTRSTS, MEMINT_EVAL_CHG); in ironlake_rps_change_irq_handler()
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Dintel_ringbuffer.c849 I915_WRITE16(IMR, dev_priv->irq_mask); in i8xx_irq_enable()
859 I915_WRITE16(IMR, dev_priv->irq_mask); in i8xx_irq_disable()
Dintel_pm.c6135 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
6139 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
6154 I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN); in ironlake_enable_drps()
6155 I915_WRITE16(TSC1, I915_READ(TSC1) | TSE); in ironlake_enable_drps()
9138 I915_WRITE16(DEUC, 0); in i965gm_init_clock_gating()
Di915_drv.h3539 #define I915_WRITE16(reg, val) dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), true) macro