Searched refs:HHI_HDMI_PLL_CNTL5 (Results 1 – 2 of 2) sorted by relevance
114 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro255 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_venci_cvbs_clock_config()264 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); in meson_venci_cvbs_clock_config()440 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_hdmi_pll_set_params()456 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); in meson_hdmi_pll_set_params()
101 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro