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Searched refs:HHI_HDMI_PLL_CNTL2 (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/meson/
Dmeson_vclk.c111 #define HHI_HDMI_PLL_CNTL2 0x324 /* 0xc9 offset in data sheet */ macro
252 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00404e00); in meson_venci_cvbs_clock_config()
261 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb300); in meson_venci_cvbs_clock_config()
433 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
436 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
453 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000 | frac); in meson_hdmi_pll_set_params()
471 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
479 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
487 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
/Linux-v4.19/drivers/clk/meson/
Dgxbb.h98 #define HHI_HDMI_PLL_CNTL2 0x324 /* 0xc9 offset in data sheet */ macro
Dgxbb.c244 .reg_off = HHI_HDMI_PLL_CNTL2,
249 .reg_off = HHI_HDMI_PLL_CNTL2,
254 .reg_off = HHI_HDMI_PLL_CNTL2,
259 .reg_off = HHI_HDMI_PLL_CNTL2,