Searched refs:HDMI_INFOFRAME_CONTROL0 (Results 1 – 10 of 10) sorted by relevance
/Linux-v4.19/drivers/gpu/drm/radeon/ |
D | evergreen_hdmi.c | 414 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, in evergreen_hdmi_enable() 422 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, in evergreen_hdmi_enable() 431 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0); in evergreen_hdmi_enable()
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D | rv770d.h | 707 #define HDMI_INFOFRAME_CONTROL0 0x7414 macro
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D | evergreend.h | 557 #define HDMI_INFOFRAME_CONTROL0 0x7044 macro
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_stream_encoder.h | 72 SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \ 143 SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, mask_sh),\ 151 SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, mask_sh),\ 152 SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, mask_sh),\ 671 uint32_t HDMI_INFOFRAME_CONTROL0; member
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D | dce_stream_encoder.c | 640 REG_UPDATE(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce110_stream_encoder_hdmi_set_stream_attribute() 732 REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, in dce110_stream_encoder_update_hdmi_info_packets() 740 REG_UPDATE_2(HDMI_INFOFRAME_CONTROL0, in dce110_stream_encoder_update_hdmi_info_packets()
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/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_stream_encoder.h | 62 SRI(HDMI_INFOFRAME_CONTROL0, DIG, id), \ 140 uint32_t HDMI_INFOFRAME_CONTROL0; member
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D | dcn10_stream_encoder.c | 573 REG_UPDATE(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in enc1_stream_encoder_hdmi_set_stream_attribute()
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/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
D | dce_v6_0.c | 1561 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, 1); in dce_v6_0_audio_hdmi_enable() 1562 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, 1); in dce_v6_0_audio_hdmi_enable() 1563 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce_v6_0_audio_hdmi_enable() 1564 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_CONT, 1); in dce_v6_0_audio_hdmi_enable() 1576 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, 0); in dce_v6_0_audio_hdmi_enable() 1577 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, 0); in dce_v6_0_audio_hdmi_enable() 1578 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 0); in dce_v6_0_audio_hdmi_enable() 1579 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_CONT, 0); in dce_v6_0_audio_hdmi_enable()
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D | dce_v11_0.c | 1658 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce_v11_0_afmt_setmode() 1660 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_CONT, 1); in dce_v11_0_afmt_setmode() 1742 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, 1); in dce_v11_0_afmt_setmode() 1744 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, 1); in dce_v11_0_afmt_setmode()
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D | dce_v10_0.c | 1616 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, 1); in dce_v10_0_afmt_setmode() 1618 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_CONT, 1); in dce_v10_0_afmt_setmode() 1700 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, 1); in dce_v10_0_afmt_setmode() 1702 tmp = REG_SET_FIELD(tmp, HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, 1); in dce_v10_0_afmt_setmode()
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