Searched refs:GICD_ICPENDR (Results 1 – 4 of 4) sorted by relevance
38 #define GICD_ICPENDR 0x0280 macro210 #define GICR_ICPENDR0 GICD_ICPENDR
87 GICR_ISPENDR0, GICD_ICPENDR, and GICR_ICPENDR0. These registers behave146 Accesses to GICD_ICPENDR register region and GICR_ICPENDR0 registers have
493 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICPENDR,
239 reg = val ? GICD_ISPENDR : GICD_ICPENDR; in gic_irq_set_irqchip_state()