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Searched refs:GEN8_MASTER_IRQ (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dinterrupt.c455 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(master, GEN8_MASTER_IRQ);
469 if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) & in gen8_check_pending_irq()
486 if (vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) in gen8_check_pending_irq()
Dhandlers.c2683 MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL, in init_broadwell_mmio_info()
/Linux-v4.19/drivers/gpu/drm/i915/
Di915_irq.c2206 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; in cherryview_irq_handler()
2227 I915_WRITE(GEN8_MASTER_IRQ, 0); in cherryview_irq_handler()
2253 I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_handler()
2902 master_ctl = I915_READ_FW(GEN8_MASTER_IRQ); in gen8_irq_handler()
2907 I915_WRITE_FW(GEN8_MASTER_IRQ, 0); in gen8_irq_handler()
2919 I915_WRITE_FW(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_irq_handler()
3587 I915_WRITE(GEN8_MASTER_IRQ, 0); in gen8_irq_reset()
3588 POSTING_READ(GEN8_MASTER_IRQ); in gen8_irq_reset()
3698 I915_WRITE(GEN8_MASTER_IRQ, 0); in cherryview_irq_reset()
3699 POSTING_READ(GEN8_MASTER_IRQ); in cherryview_irq_reset()
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Di915_debugfs.c713 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
788 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
Di915_reg.h7069 #define GEN8_MASTER_IRQ _MMIO(0x44200) macro