Searched refs:GEN8_L3_LRA_1_GPGPU (Results 1 – 3 of 3) sorted by relevance
2221 I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW); in gtt_write_workarounds()2223 I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV); in gtt_write_workarounds()2225 I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT); in gtt_write_workarounds()2227 I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL); in gtt_write_workarounds()
10333 #define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4) macro
2777 MMIO_D(GEN8_L3_LRA_1_GPGPU, D_BDW_PLUS); in init_broadwell_mmio_info()