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Searched refs:GEN7_MISCCPCTL (Results 1 – 7 of 7) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_guc_fw.c119 I915_WRITE(GEN7_MISCCPCTL, (GEN8_DOP_CLOCK_GATE_GUC_ENABLE | in guc_prepare_xfer()
120 I915_READ(GEN7_MISCCPCTL))); in guc_prepare_xfer()
Di915_perf.c1579 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) & in hsw_enable_metric_set()
1619 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) | in hsw_disable_metric_set()
Di915_irq.c1392 misccpctl = I915_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()
1393 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in ivybridge_parity_work()
1394 POSTING_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()
1434 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in ivybridge_parity_work()
Di915_drv.c2282 s->misccpctl = I915_READ(GEN7_MISCCPCTL); in vlv_save_gunit_s0ix_state()
2364 I915_WRITE(GEN7_MISCCPCTL, s->misccpctl); in vlv_restore_gunit_s0ix_state()
Dintel_pm.c91 I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) in gen9_init_clock_gating()
8680 misccpctl = I915_READ(GEN7_MISCCPCTL); in gen8_set_l3sqc_credits()
8681 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in gen8_set_l3sqc_credits()
8695 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in gen8_set_l3sqc_credits()
Di915_reg.h8616 #define GEN7_MISCCPCTL _MMIO(0x9424) macro
/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dhandlers.c2721 MMIO_D(GEN7_MISCCPCTL, D_BDW_PLUS); in init_broadwell_mmio_info()