| /Linux-v4.19/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 448 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
468 GATE_PERI0(CLK_PERI_I2C5, "i2c5_ck", "axi_sel", 31),
469 GATE_PERI0(CLK_PERI_I2C4, "i2c4_ck", "axi_sel", 30),
470 GATE_PERI0(CLK_PERI_I2C3, "i2c3_ck", "axi_sel", 29),
471 GATE_PERI0(CLK_PERI_I2C2, "i2c2_ck", "axi_sel", 28),
472 GATE_PERI0(CLK_PERI_I2C1, "i2c1_ck", "axi_sel", 27),
473 GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 26),
474 GATE_PERI0(CLK_PERI_UART3, "uart3_ck", "axi_sel", 25),
475 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24),
476 GATE_PERI0(CLK_PERI_UART1, "uart1_ck", "axi_sel", 23),
[all …]
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| D | clk-mt2701.c | 817 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
836 GATE_PERI0(CLK_PERI_USB0_MCU, "usb0_mcu_ck", "axi_sel", 31),
837 GATE_PERI0(CLK_PERI_ETH, "eth_ck", "clk26m", 30),
838 GATE_PERI0(CLK_PERI_SPI0, "spi0_ck", "spi0_sel", 29),
839 GATE_PERI0(CLK_PERI_AUXADC, "auxadc_ck", "clk26m", 28),
840 GATE_PERI0(CLK_PERI_I2C3, "i2c3_ck", "clk26m", 27),
841 GATE_PERI0(CLK_PERI_I2C2, "i2c2_ck", "axi_sel", 26),
842 GATE_PERI0(CLK_PERI_I2C1, "i2c1_ck", "axi_sel", 25),
843 GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 24),
844 GATE_PERI0(CLK_PERI_BTIF, "bitif_ck", "axi_sel", 23),
[all …]
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| D | clk-mt7622.c | 96 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
483 GATE_PERI0(CLK_PERI_THERM_PD, "peri_therm_pd", "axi_sel", 1),
484 GATE_PERI0(CLK_PERI_PWM1_PD, "peri_pwm1_pd", "clkxtal", 2),
485 GATE_PERI0(CLK_PERI_PWM2_PD, "peri_pwm2_pd", "clkxtal", 3),
486 GATE_PERI0(CLK_PERI_PWM3_PD, "peri_pwm3_pd", "clkxtal", 4),
487 GATE_PERI0(CLK_PERI_PWM4_PD, "peri_pwm4_pd", "clkxtal", 5),
488 GATE_PERI0(CLK_PERI_PWM5_PD, "peri_pwm5_pd", "clkxtal", 6),
489 GATE_PERI0(CLK_PERI_PWM6_PD, "peri_pwm6_pd", "clkxtal", 7),
490 GATE_PERI0(CLK_PERI_PWM7_PD, "peri_pwm7_pd", "clkxtal", 8),
491 GATE_PERI0(CLK_PERI_PWM_PD, "peri_pwm_pd", "clkxtal", 9),
[all …]
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| D | clk-mt2712.c | 1041 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
1070 GATE_PERI0(CLK_PERI_NFI, "per_nfi",
1072 GATE_PERI0(CLK_PERI_THERM, "per_therm",
1074 GATE_PERI0(CLK_PERI_PWM0, "per_pwm0",
1076 GATE_PERI0(CLK_PERI_PWM1, "per_pwm1",
1078 GATE_PERI0(CLK_PERI_PWM2, "per_pwm2",
1080 GATE_PERI0(CLK_PERI_PWM3, "per_pwm3",
1082 GATE_PERI0(CLK_PERI_PWM4, "per_pwm4",
1084 GATE_PERI0(CLK_PERI_PWM5, "per_pwm5",
1086 GATE_PERI0(CLK_PERI_PWM6, "per_pwm6",
[all …]
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| D | clk-mt8173.c | 669 #define GATE_PERI0(_id, _name, _parent, _shift) { \ macro
689 GATE_PERI0(CLK_PERI_NFI, "peri_nfi", "axi_sel", 0),
690 GATE_PERI0(CLK_PERI_THERM, "peri_therm", "axi_sel", 1),
691 GATE_PERI0(CLK_PERI_PWM1, "peri_pwm1", "axi_sel", 2),
692 GATE_PERI0(CLK_PERI_PWM2, "peri_pwm2", "axi_sel", 3),
693 GATE_PERI0(CLK_PERI_PWM3, "peri_pwm3", "axi_sel", 4),
694 GATE_PERI0(CLK_PERI_PWM4, "peri_pwm4", "axi_sel", 5),
695 GATE_PERI0(CLK_PERI_PWM5, "peri_pwm5", "axi_sel", 6),
696 GATE_PERI0(CLK_PERI_PWM6, "peri_pwm6", "axi_sel", 7),
697 GATE_PERI0(CLK_PERI_PWM7, "peri_pwm7", "axi_sel", 8),
[all …]
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