Searched refs:Freq (Results 1 – 9 of 9) sorted by relevance
333 for (n = 0; n < L_CODES; n++) s->dyn_ltree[n].Freq = 0; in init_block()334 for (n = 0; n < D_CODES; n++) s->dyn_dtree[n].Freq = 0; in init_block()335 for (n = 0; n < BL_CODES; n++) s->bl_tree[n].Freq = 0; in init_block()337 s->dyn_ltree[END_BLOCK].Freq = 1; in init_block()362 (tree[n].Freq < tree[m].Freq || \363 (tree[n].Freq == tree[m].Freq && depth[n] <= depth[m]))444 f = tree[n].Freq; in gen_bitlen()479 *(long)tree[m].Freq; in gen_bitlen()557 if (tree[n].Freq != 0) { in build_tree()572 tree[node].Freq = 1; in build_tree()[all …]
51 #define Freq fc.freq macro
45 uint16_t Freq; member105 uint32_t Freq; /* In MHz */ member
121 uint16_t Freq; /* in MHz */ member
771 unsigned VClk, Freq; in CalcVClock() local787 Freq = VClk << P; in CalcVClock()788 if ((Freq >= 128000) && (Freq <= 350000)) { in CalcVClock()792 Freq = in CalcVClock()795 if (Freq > VClk) in CalcVClock()796 DeltaNew = Freq - VClk; in CalcVClock()798 DeltaNew = VClk - Freq; in CalcVClock()802 *clockOut = Freq; in CalcVClock()817 unsigned VClk, Freq; in CalcVClock2Stage() local827 Freq = VClk << P; in CalcVClock2Stage()[all …]
1182 unsigned VClk, Freq; in CalcVClock() local1203 Freq = VClk << P; in CalcVClock()1204 if ((Freq >= 128000) && (Freq <= chip->MaxVClockFreqKHz)) in CalcVClock()1210 Freq = (chip->CrystalFreqKHz * N / M) >> P; in CalcVClock()1211 if (Freq > VClk) in CalcVClock()1212 DeltaNew = Freq - VClk; in CalcVClock()1214 DeltaNew = VClk - Freq; in CalcVClock()1220 *clockOut = Freq; in CalcVClock()
402 ptable->entries[i].clk = pclk_dependency_table->Freq * 100; in smu10_get_clock_voltage_dependency_table()427 if (0 == result && table->DcefClocks[0].Freq != 0) { in smu10_populate_clock_table()
1855 pp_table->DisplayClockTable[disp_clock][i].Freq = in vega10_populate_single_display_type()1862 pp_table->DisplayClockTable[disp_clock][i].Freq = in vega10_populate_single_display_type()
162 |Lv| Freq | Voltage |