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Searched refs:Fld (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/drivers/video/fbdev/mbx/
Dreg_bits.h7 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
17 #define SYSCLKSRC_SEL Fld(2,0)
23 #define PIXCLKSRC_SEL Fld(2,0)
32 #define CORE_PLL_M Fld(6,7)
34 #define CORE_PLL_N Fld(3,4)
36 #define CORE_PLL_P Fld(3,1)
41 #define DISP_PLL_M Fld(6,7)
43 #define DISP_PLL_N Fld(3,4)
45 #define DISP_PLL_P Fld(3,1)
65 #define MBXCLK_DIV Fld(2,2)
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/Linux-v4.19/arch/arm/mach-sa1100/include/mach/
DSA-1100.h137 #define UDCAR_ADD Fld (7, 0) /* function ADDress */
139 #define UDCOMP_OUTMAXP Fld (8, 0) /* OUTput MAXimum Packet size - 1 */
145 #define UDCIMP_INMAXP Fld (8, 0) /* INput MAXimum Packet size - 1 */
177 #define UDCD0_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
179 #define UDCWC_WC Fld (4, 0) /* Write Count */
181 #define UDCDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
337 #define UTCR1_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */
338 #define UTCR2_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */
378 #define UTDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
474 #define SDCR2_AMV Fld (8, 0) /* Address Match Value */
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Dbitfield.h46 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
/Linux-v4.19/arch/arm/mach-pxa/include/mach/
Dregs-lcd.h89 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
92 #define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */
95 #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */
98 #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */
101 #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */
104 #define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse - 1 */
107 #define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */
110 #define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */
126 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */
129 #define LCCR3_ACB Fld (8, 8) /* AC Bias */
Dbitfield.h47 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
/Linux-v4.19/arch/arm/include/asm/hardware/
Dsa1111.h67 #define SMCR_DRAC Fld(3, 2)