Searched refs:FIXED_DIV_PLL (Results 1 – 3 of 3) sorted by relevance
178 sysclks[2].flags |= FIXED_DIV_PLL; in c6455_setup_clocks()180 sysclks[3].flags |= FIXED_DIV_PLL; in c6455_setup_clocks()216 sysclks[1].flags |= FIXED_DIV_PLL; in c6457_setup_clocks()218 sysclks[2].flags |= FIXED_DIV_PLL; in c6457_setup_clocks()220 sysclks[3].flags |= FIXED_DIV_PLL; in c6457_setup_clocks()268 sysclks[i].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()272 sysclks[7].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()274 sysclks[8].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()276 sysclks[9].flags |= FIXED_DIV_PLL; in c6472_setup_clocks()315 sysclks[7].flags |= FIXED_DIV_PLL; in c6474_setup_clocks()[all …]
236 if (clk->flags & FIXED_DIV_PLL) { in clk_sysclk_recalc()
103 #define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */ macro
