Searched refs:EXYNOS_4x12_UPHYCLK (Results 1 – 1 of 1) sorted by relevance
58 #define EXYNOS_4x12_UPHYCLK 0x4 macro200 clk = readl(drv->reg_phy + EXYNOS_4x12_UPHYCLK); in exynos4x12_setup_clk()208 writel(clk, drv->reg_phy + EXYNOS_4x12_UPHYCLK); in exynos4x12_setup_clk()
