Searched refs:EMIF_SDRAM_TIMING_1_SHDW (Results 1 – 3 of 3) sorted by relevance
127 #define EMIF_SDRAM_TIMING_1_SHDW 0x001c macro
154 str r1, [r0, #EMIF_SDRAM_TIMING_1_SHDW]
948 writel(tim1, base + EMIF_SDRAM_TIMING_1_SHDW); in setup_temperature_sensitive_regs()
