Searched refs:EDP_PSR_CTL (Results 1 – 3 of 3) sorted by relevance
386 val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK; in hsw_activate_psr1()387 I915_WRITE(EDP_PSR_CTL, val); in hsw_activate_psr1()531 WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); in intel_psr_activate()656 I915_WRITE(EDP_PSR_CTL, in intel_psr_disable_source()657 I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE); in intel_psr_disable_source()671 WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); in intel_psr_disable_source()831 val = I915_READ(EDP_PSR_CTL); in intel_psr_exit()833 I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE); in intel_psr_exit()
2718 enabled = I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE; in i915_edp_psr_status()
4135 #define EDP_PSR_CTL _MMIO(dev_priv->psr_mmio_base + 0) macro
