Searched refs:EDCIDSR (Results 1 – 2 of 2) sorted by relevance
37 sampling registers: EDPCSR, EDVIDSR and EDCIDSR: from EDPCSR we can get39 bit width, etc; EDCIDSR is context ID value which contains the sampled value181 coresight-cpu-debug 850000.debug: EDCIDSR: 00000000186 coresight-cpu-debug 852000.debug: EDCIDSR: 00000000
29 #define EDCIDSR 0x0A4 macro232 drvdata->edcidsr = readl_relaxed(drvdata->base + EDCIDSR); in debug_read_regs()
